************************************************
* FileName:		ex4.asm                        *
* Description:	同步串口實驗                   *
* Copyright(C) SanZhi Electronic, Author Zpin  *
************************************************

		.title "ex4"

BSP			.set		1		;當前使用McBsp1

;McBsp 內存映射寄存器
SPSA0		.set    038h
SPSD0		.set    039h
DRR10		.set    021h
DRR20		.set	020h
DXR10		.set    023h
DXR20		.set	022h

SPSA1		.set    048h
SPSD1       .set    049h
DRR11       .set	041h
DRR21       .set    040h
DXR11       .set    043h
DXR21       .set	042h


;McBsp Subaddressed Registers
SPCR1		.set	00h
SPCR2		.set	01h
RCR1		.set	02h
RCR2		.set	03h
XCR1		.set	04h
XCR2		.set	05h
SRGR1		.set	06h
SRGR2		.set	07h
MCR1		.set	08h
MCR2		.set	09h
RCERA		.set	0ah
RCERB		.set	0bh
XCERA		.set	0ch
XCERB		.set	0dh
PCR			.set	0eh

		.if BSP = 0
SPSA	.set	SPSA0
SPSD	.set	SPSD0
RDRR	.set	DRR10
RDXR	.set	DXR10
		.endif
		
		.if BSP = 1
SPSA	.set	SPSA1
SPSD	.set	SPSD1
RDRR	.set	DRR11
RDXR	.set	DXR11
		.endif
		

WR_SUB_REG	.macro val,addr			;寫McBsp控制寄存器
			stm addr,SPSA
			nop
			stm val,SPSD
			nop
			.endm
			
RD_SUB_REG	.macro addr,acc			;讀McBsp控制寄存器
			stm #:addr:,SPSA
			nop
			ldm SPSD,acc
			nop
			nop
			nop
			.endm

WAITTRX   .macro					;等待串口中斷
WAITR?
        RD_SUB_REG SPCR1,A
        and #1<<1, A
        bc   WAITR?, AEQ
          .endm

PROGREG   .macro progword			;與AD50二次通訊
 		stm  #01h,RDXR
        WAITTRX
        stm     #:progword:,RDXR
        WAITTRX
          .endm               


wait   .macro
  		STM #0008h, AR0
		RPT *AR0
		NOP
		.endm 			

		.mmregs
		.global _c_int00


		.sect ".vectors"

RESET	bd _c_int00
		stm #2000h,SP
		.space 19*4*16
BRINT0	b recv
		nop
		nop
BXINT0	b trans
		nop
		nop
		.space 4*4*16
BRINT1	b recv
	nop
	nop
BXINT1	b trans
	nop
	nop
		.space 4*4*16
		

		.text
_c_int00
		ld #0h,DP
		stm #2000h,SP
		ssbx INTM
		ssbx SXM
        st #2491h,SWWSR
        st #0ffe0h,PMST
        st #0f007h,CLKMD
        
        stm #4000h,AR1
    	stm #4000h,ar2
        
mcbsp_init							;初始化McBsp串口
        rsbx CPL
	    nop							; cpl latency
     	nop							; cpl latency
		nop							; cpl latency

		ld   #0, DP              
		ssbx INTM      
		ssbx SXM  

		WR_SUB_REG #0000H,SPCR1
		WR_SUB_REG #0200H,SPCR2
		WR_SUB_REG #000CH,PCR
		WR_SUB_REG #0000H,SPCR1
		WR_SUB_REG #0000H,SPCR2
		WR_SUB_REG #0040H,RCR1		;16 BITs
		WR_SUB_REG #0004H,RCR2		;Ignore FS after the first
		WR_SUB_REG #0040H,XCR1		;16 BITs
		WR_SUB_REG #0004H,XCR2		;Ignore FS after the first

		ld 100,A
		wait
		
		andm #0ff3fh, 54h			;set interrupts to come from serial ports not DMA
									;by clearing bits 6 and 7 in DMPREC
		stm #0,RDXR
		
		WR_SUB_REG #0001H,SPCR1		;啟動McBsp串口
		WR_SUB_REG #0201H,SPCR2
		
		ld 100,A
		wait
		
aic_init
		stm #0h,IMR
		orm #0c00h,IMR
		stm #0ffffh,IFR
        PROGREG 0000001100000001b
             ;      876543210
        PROGREG 0000010000010000b
             ;      876543210
		;PROGREG 0104H				;二次通訊初始化AD50
		;PROGREG 0280H
		;PROGREG 0301h
		;PROGREG 045Ah
		;PROGREG 0000001100000001b
             ;         876543210
        ;PROGREG 0000010000010000b
             ;         876543210

		ld RDRR,A
		ld RDRR,A
		
		stlm A,RDXR
		stlm A,RDXR
		
		rsbx INTM
		nop
		nop
		nop
		
js		nop
		nop
		nop
		b js

recv	ldm RDRR,A				;ADC采樣數據發送到DAC輸出
		and #0fffeh,a
		stlm A,RDXR
		rete

trans	rsbx XF
		rete
		.end