*(UINT16 *)(V3_BASE + V3_LB_MAP1) =    			(((INTEGRATOR_PCI_BASE + SZ_256M) >> 20) << 4) | 0x0006;    /*     * Allow accesses to PCI Configuration space     * and set up A1, A0 for type 1 config cycles     */    *(UINT16 *)(V3_BASE + V3_PCI_CFG) = ((*(UINT16 *)(V3_BASE + V3_PCI_CFG)) &			   ~(V3_PCI_CFG_M_RETRY_EN | V3_PCI_CFG_M_AD_LOW1) ) |			   V3_PCI_CFG_M_AD_LOW0;    /* now we can allow in PCI MEMORY accesses */    *(UINT16 *)(V3_BASE + V3_PCI_CMD) =		    (*(UINT16 *)(V3_BASE + V3_PCI_CMD)) | V3_COMMAND_M_MEM_EN;    /*     * Set RST_OUT to take the PCI bus is out of reset, PCI devices can     * initialise and lock the V3 system register so that no one else     * can play with it     */   *(UINT16 *)(V3_BASE + V3_SYSTEM) =		    (*(UINT16 *)(V3_BASE + V3_SYSTEM)) | V3_SYSTEM_M_RST_OUT;   *(UINT16 *)(V3_BASE + V3_SYSTEM) =   			(*(UINT16 *)(V3_BASE + V3_SYSTEM)) | V3_SYSTEM_M_LOCK;    return;    }#endif /* defined(INCLUDE_PCI) *//********************************************************************************* sysHwInit - initialize the CPU board hardware** This routine initializes various features of the hardware.* Normally, it is called from usrInit() in usrConfig.c.** NOTE: This routine should not be called directly by the user.** RETURNS: N/A*/void sysHwInit (void)    {    /* install the IRQ/SVC interrupt stack splitting routine */    _func_armIntStackSplit = sysIntStackSplit;#if defined(INCLUDE_PCI)    /* Initialise the V3 PCI bridge controller */    sysV3Init();    /*  Initialise PCI driver library. */    if (pciIomapLibInit (PCI_MECHANISM_3, CPU_PCI_CNFG_ADRS,    			 CPU_PCI_CNFG_ADRS, 0) != OK)	sysToMonitor (BOOT_NO_AUTOBOOT);#endif  /* INCLUDE_PCI */#ifdef INCLUDE_SERIAL    /* initialise the serial devices */    sysSerialHwInit ();      /* initialise serial data structure */#endif /* INCLUDE_SERIAL */    }/********************************************************************************* sysHwInit2 - additional system configuration and initialization** This routine connects system interrupts and does any additional* configuration necessary.  Note that this is called from* sysClkConnect() in the timer driver.** RETURNS: N/A**/void sysHwInit2 (void)    {    static BOOL initialised = FALSE;    if (initialised)    	return;    /* initialise the interrupt library and interrupt driver */    intLibInit (AMBA_INT_NUM_LEVELS, AMBA_INT_NUM_LEVELS, INT_MODE);    ambaIntDevInit();    /* connect sys clock interrupt and auxiliary clock interrupt */    (void)intConnect (INUM_TO_IVEC (SYS_TIMER_INT_VEC), sysClkInt, 0);    (void)intConnect (INUM_TO_IVEC (AUX_TIMER_INT_VEC), sysAuxClkInt, 0);#ifdef INCLUDE_SERIAL    /* connect serial interrupt */    sysSerialHwInit2();#endif /* INCLUDE_SERIAL */#if defined (INCLUDE_PCI)#if defined (INCLUDE_DEC21X40END) || defined (INCLUDE_FEI82557END)    /* map all appropriate Ethernet PCI device memory and I/O addresses */    sysLanPciInit ();#endif  /* INCLUDE_DEC21X40END/FEI82557END */#if defined (INCLUDE_USB)    /* Low level init for usb */    sysUsbPciInit();#endif#endif  /* INCLUDE_PCI */    initialised = TRUE;    }/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** Normally, the user specifies the amount of physical memory with the* macro LOCAL_MEM_SIZE in config.h.  BSPs that support run-time* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the* true size of physical memory.** NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application* use.  See sysMemTop() for more information on reserving memory.** RETURNS: The address of the top of physical memory.** SEE ALSO: sysMemTop()*/char * sysPhysMemTop (void)    {    static char * physTop = NULL;    if (physTop == NULL)	{#ifdef LOCAL_MEM_AUTOSIZE	/* If auto-sizing is possible, this would be the spot.  */#	error   "Dynamic memory sizing not supported"#else	/* Don't do autosizing, if size is given */	physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);#endif /* LOCAL_MEM_AUTOSIZE */	}    return physTop;    }/********************************************************************************* sysMemTop - get the address of the top of VxWorks memory** This routine returns a pointer to the first byte of memory not* controlled or used by VxWorks.** The user can reserve memory space by defining the macro USER_RESERVED_MEM* in config.h.  This routine returns the address of the reserved memory* area.  The value of USER_RESERVED_MEM is in bytes.** RETURNS: The address of the top of VxWorks memory.*/char * sysMemTop (void)    {    static char * memTop = NULL;    if (memTop == NULL)	{	memTop = sysPhysMemTop () - USER_RESERVED_MEM;	}    return memTop;    }/********************************************************************************* sysToMonitor - transfer control to the ROM monitor** This routine transfers control to the ROM monitor.  It is usually called* only by reboot() -- which services ^X -- and bus errors at interrupt* level.  However, in some circumstances, the user may wish to introduce a* new <startType> to enable special boot ROM facilities.** RETURNS: Does not return.*/STATUS sysToMonitor    (    int startType	/* passed to ROM to tell it how to boot */    )    {    FUNCPTR	pRom;    UINT32 *	p = (UINT32 *)ROM_TEXT_ADRS;#ifdef INCLUDE_SERIAL    sysSerialReset ();	/* put serial devices into quiet state */#endif    /*     * Examine ROM - if it's a VxWorks boot ROM, jump to the warm boot entry     * point; otherwise jump to the start of the ROM.     * A VxWorks boot ROM begins     *    MOV	R0,#BOOT_COLD     *    B	...     *    DCB	"Copyright"     * We check the first and third words only. This could be tightened up     * if required (see romInit.s).     */    if (p[0] == 0xE3A00002 && p[2] == 0x79706F43)	pRom = (FUNCPTR)(ROM_TEXT_ADRS + 4);	/* warm boot address */    else	pRom = (FUNCPTR)ROM_TEXT_ADRS;		/* start of ROM */#if defined(CPU_720T)  || defined(CPU_720T_T) || \    defined(CPU_740T)  || defined(CPU_740T_T) || \    defined(CPU_920T)  || defined(CPU_920T_T) || \    defined(CPU_940T)  || defined(CPU_940T_T) || \    defined(CPU_946ES) || defined(CPU_946ES_T)    VM_ENABLE(FALSE);	/* disable the MMU, cache(s) and write-buffer */#endif#if defined(CPU_920T) || defined(CPU_920T_T)    /*     * On 920T, can have the I-cache enabled once the MMU has been     * disabled, so, unlike the other processors, disabling the MMU does     * not disable the I-cache.  This would not be a problem, as the     * 920T boot ROM initialisation code disables and flushes both caches.     * However, in case we are, in fact, using a 7TDMI boot ROM,     * disable and flush the I-cache here, or else the boot process may     * fail.     */    cacheDisable (INSTRUCTION_CACHE);#endif /* defined(CPU_920T/920T_T) */    (*pRom)(startType);	/* jump to boot ROM */    return OK;		/* in case we ever continue from ROM monitor */    }/****************************************************************************** sysProcNumGet - get the processor number** This routine returns the processor number for the CPU board, which is* set with sysProcNumSet().** RETURNS: The processor number for the CPU board.** SEE ALSO: sysProcNumSet()*/int sysProcNumGet (void)    {    return 0;    }/****************************************************************************** sysProcNumSet - set the processor number** Set the processor number for the CPU board.  Processor numbers should be* unique on a single backplane.** NOTE* By convention, only processor 0 should dual-port its memory.** RETURNS: N/A** SEE ALSO: sysProcNumGet()*/void sysProcNumSet    (    int procNum		/* processor number */    )    {    sysProcNum = procNum;    }/******************************************************************************** sysLedsReadWrite - read/write the state of the LEDs on the board** This routine can be used to read and write the state of the four LEDs* on the board. The current state is ANDed and EORed with the supplied* parameters. Bits 0..3 control LEDs 0..3. A 1 switches the LED on; a 0 off.** RETURNS: previous state of LEDs.*/int sysLedsReadWrite    (    int and,    int eor    )    {    UINT32	 	current, previous;    int			oldLevel;    oldLevel = intLock();    /* read current value from hardware and mask off undefined bits */    current = *((volatile UINT32 *)LED_LIGHTS) & LED_LEDS_MASK;    previous = current;    current = (current & and) ^ eor;    /* wait for display status to be idle */    while (*((volatile UINT32 *)LED_ALPHA) & LED_STATUS)	;    /* set new value */    *((volatile UINT32 *)LED_LIGHTS) = current;    intUnlock (oldLevel);    return previous;    }#ifdef INCLUDE_FLASH/******************************************************************************** sysFlashWriteEnable - enable write access to the Flash memory** This routine is used by flashMem.c to enable write access to the* Flash memory.** RETURNS: N/A*/void sysFlashWriteEnable (void)     {     volatile UINT32 * ebiCsr = (volatile UINT32 *)INTEGRATOR_EBI_CSR1;     /* allow write access to EBI_CSR1 area (Flash ) */     *ebiCsr |= INTEGRATOR_EBI_WRITE_ENABLE;     if (!(*ebiCsr & INTEGRATOR_EBI_WRITE_ENABLE))	 {	 *(volatile UINT32 *)INTEGRATOR_EBI_LOCK = 0xA05F;	 *ebiCsr |= INTEGRATOR_EBI_WRITE_ENABLE;	 *(volatile UINT32 *)INTEGRATOR_EBI_LOCK = 0;	 }     /* Enable Vpp and allow write access to Flash in system controller */     *(volatile UINT32 *)INTEGRATOR_SC_CTRLS = FL_SC_CONTROL;     }/******************************************************************************** sysFlashWriteDisable - disable write access to the Flash memory** This routine is used by flashMem.c to disable write access to the* Flash memory.** RETURNS: N/A*/void sysFlashWriteDisable (void)     {     volatile UINT32 * ebiCsr = (volatile UINT32 *)INTEGRATOR_EBI_CSR1;     /* disable write access to EBI_CSR1 area (Flash ) */     *ebiCsr &= ~INTEGRATOR_EBI_WRITE_ENABLE;     if (*ebiCsr & INTEGRATOR_EBI_WRITE_ENABLE)	 {	 *(volatile UINT32 *)INTEGRATOR_EBI_LOCK = 0xA05F;	 *ebiCsr &= ~INTEGRATOR_EBI_WRITE_ENABLE;	 *(volatile UINT32 *)INTEGRATOR_EBI_LOCK = 0;	 }     /* Disable Vpp and disable write access to Flash in system controller */     *(volatile UINT32 *)INTEGRATOR_SC_CTRLS = 0;     }#endif /* INCLUDE_FLASH */