?? m5282.h
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/* * mcf5282.h -- Definitions for Motorola Coldfire 5282 * * Based on mcf5282sim.h of uCLinux distribution: * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA *//****************************************************************************/#ifndef m5282_h#define m5282_h/****************************************************************************//* * Size of internal RAM */#define INT_RAM_SIZE 65536/* * Define the 5282 SIM register set addresses. */#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */#define MCFINTC_IRLR 0x18 /* */#define MCFINTC_IACKL 0x19 /* */#define MCFINTC_ICR0 0x40 /* Base ICR register */#define MCFINT_UART0 13 /* Interrupt number for UART0 */#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */#define MCF5282_GPIO_PUAPAR 0x10005C/****************************************************************************/#endif /* m5282_h */
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