/*-----------------------------------------------------------------------------
@@
@@ (Summary): Watchdog Timer (WDT) System Level Definitions Header File
@@
@@ (Comment): System Level Setting of WDT
@@
@@ (Author) : Tan Wee Kah
@@
@@ (RCS ID)  :
@@
-----------------------------------------------------------------------------*/
#ifndef APD_WDT_SYS_DEF_H
#define APD_WDT_SYS_DEF_H

/*-----------------------------------------------------------------------------
@@ Definitions of WDT Timeout Response
@@
@@  APD_WDT_RSP_FIQ     : FIQ Timeout Response
@@  APD_WDT_RSP_SYSRST  : System Reset Timeout Response
@@
@@ Default is system reset timeout response
-----------------------------------------------------------------------------*/
#define APD_WDT_RSP     APD_WDT_RSP_SYSRST

/*-----------------------------------------------------------------------------
@@ Definitions of WDT Timeout Period
@@
@@  APD_WDT_TOP_21  : 2pow(21)/ 2,097,152 clock cycles
@@  APD_WDT_TOP_22  : 2pow(22)/ 4,194,304 clock cycles
@@  APD_WDT_TOP_23  : 2pow(23)/ 8,388,608 clock cycles
@@  APD_WDT_TOP_24  : 2pow(24)/ 16,777,216 clock cycles
@@  APD_WDT_TOP_25  : 2pow(25)/ 33,554,432 clock cycles
@@  APD_WDT_TOP_26  : 2pow(26)/ 67,108,864 clock cycles
@@  APD_WDT_TOP_29  : 2pow(29)/ 536,870,912 clock cycles
@@  APD_WDT_TOP_31  : 2pow(31)/ 2,147,483,648 clock cycles
@@
@@ Default is 2,097,152 clcok cycles
-----------------------------------------------------------------------------*/
#define APD_WDT_TOP     APD_WDT_TOP_21

#endif