/*
** LDF for ADSP-BF533.
** 
** There are a number of configuration options that can be specified
** either by compiler flags, or by linker flags directly. The options are:
** 
** USE_PROFILER0
** 	Enabled by -p. Link in profiling library, and write results to
** 	both stdout and mon.out.
** USE_PROFILER1
** 	Enabled by -p1. Only write profiling data to mon.out.
** USE_PROFILER2
** 	Enabled by -p2. Only write profiling data to stdout.
** __WORKAROUNDS_ENABLED
**    Defined by compiler when -workaround is used to direct LDF to
**    link with libraries that have been built with work-arounds
**    enabled.
** USE_FILEIO
**    Always defined; enables the File I/O Support, which is necessary
**    for printf() to produce any output.
** USE_CACHE
** 	Makes use of Some L1 memory as cache. Implies the presence
** 	of at least some external memory.
** USE_SDRAM
**     Makes SDRAM available as standard program/data memory, with no
**     cache configuration of L1.
** PARTITION_EZKIT_SDRAM
**    The ADSP-BF533 is supplied with one external bank populated with
**    with 32MB of SDRAM. The ADSP-BF533 EBIU allows for 4 internal banks
**    in an external SDRAM bank to be accessed simultaneously, reducing the
**    stall on access compared to keeping program and data in one bank.
**    Defining this macro partitions the SDRAM into 4 8MB banks with the
**    intention of use being: bank0 - heap, bank1 - data, bank2 - data/bsz,
**    bank3 - program. See 533 Hardware Reference Manual, 17-22, SDRAM
**    controler.
**    NOTE: Either USE_CACHE or USE_SDRAM must also be defined to use this.
** USER_CRT
**    Specifies a custom or System Builder generated CRT object to use.
** _ADI_LIBIO
**   Use the ADI io library (default and fast)
** _DINKUM_IO
**   Use dinkum io library (slower but more compatible). Enabled
**   by the flag -full-io
**
** Memory map.
**
** The known memory spaces are as follows:
**
** 0xFFE00000 - 0xFFFFFFFF  Core MMR registers (2MB)
** 0xFFC00000 - 0xFFDFFFFF  System MMR registers (2MB)
** 0xFFB01000 - 0xFFBFFFFF  Reserved
** 0xFFB00000 - 0xFFB00FFF  Scratch SRAM (4K)
** 0xFFA14000 - 0xFFAFFFFF  Reserved
** 0xFFA10000 - 0xFFA13FFF  Code SRAM / cache (16K)
** 0xFFA00000 - 0xFFA0FFFF  Code SRAM (64K)
** 0xFF908000 - 0xFF9FFFFF  Reserved
** 0xFF904000 - 0xFF907FFF  Data Bank B SRAM / cache (16K)
** 0xFF900000 - 0xFF903FFF  Data Bank B SRAM (16K)
** 0xFF808000 - 0xFF8FFFFF  Reserved
** 0xFF804000 - 0xFF807FFF  Data Bank A SRAM / cache (16K)
** 0xFF800000 - 0xFF803FFF  Data Bank A SRAM (16K)
** 0xEF000000 - 0xFF7FFFFF  Reserved
** 0x20400000 - 0xEEFFFFFF  Reserved
** 0x20300000 - 0x203FFFFF  ASYNC MEMORY BANK 3 (1MB)
** 0x20200000 - 0x202FFFFF  ASYNC MEMORY BANK 2 (1MB)
** 0x20100000 - 0x201FFFFF  ASYNC MEMORY BANK 1 (1MB)
** 0x20000000 - 0x200FFFFF  ASYNC MEMORY BANK 0 (1MB)
** 0x00000000 - 0x07FFFFFF  SDRAM MEMORY (16MB - 128MB)

*/

ARCHITECTURE(ADSP-BF533)

#ifndef __NO_STD_LIB
SEARCH_DIR( $ADI_DSP/Blackfin/lib )
#endif

# if defined(USE_INSTRUCTION_CACHE) || \
     defined(USE_DATA_A_CACHE) || defined(USE_DATA_B_CACHE)
#  define USE_CACHE_PARTS 1
# else
#  define USE_CACHE_PARTS 0
#endif

#define INSTR_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_INSTRUCTION_CACHE) || !USE_CACHE_PARTS ) ) )

#define DATAA_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_DATA_A_CACHE) || defined(USE_DATA_B_CACHE) || \
         !USE_CACHE_PARTS ) ) )

#define DATAB_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_DATA_B_CACHE) || !USE_CACHE_PARTS ) ) )

#if defined(USE_PROFILER0) || \
    defined(USE_PROFILER1) || \
    defined(USE_PROFILER2)
#  if !defined(USE_PROFILER)
#    define USE_PROFILER
#  endif
   // The profiler needs File I/O to write its results.
#  define USE_FILEIO 1
#else
#  define PROFFLAG
#endif

#ifndef USE_FILEIO   /* { */
#define USE_FILEIO 1
#endif   /* } */

#ifdef USE_PROFILER0	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG , prfflg0_532y.doj
#else
#define PROFFLAG , prfflg0_532.doj
#endif	/* } */
#endif	/* } */

#ifdef USE_PROFILER1	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG , prfflg1_532y.doj
#else
#define PROFFLAG , prfflg1_532.doj
#endif	/* } */
#endif	/* } */

#ifdef USE_PROFILER2	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG , prfflg2_532y.doj
#else
#define PROFFLAG , prfflg2_532.doj
#endif	/* } */
#endif	/* } */

#ifdef __WORKAROUNDS_ENABLED	/* { */
#define OMEGA idle532y.doj
#else
#define OMEGA idle532.doj
#endif	/* } */

#define MEMINIT __initsbsz532.doj,

#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBSMALL libsmall532y.dlb,
#define FLT64  libf64ieee532y.dlb
#else
#define LIBSMALL libsmall532.dlb,
#define FLT64  libf64ieee532.dlb
#endif	/* } */

#ifdef M3_RESERVED	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBM3 libm3res532y.dlb
#define LIBDSP libdspm3res532y.dlb
#define SFTFLT libsftflt532y.dlb
#else
#define LIBM3 libm3res532.dlb
#define LIBDSP libdspm3res532.dlb
#define SFTFLT libsftflt532.dlb
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBM3 libm3free532y.dlb
#define LIBDSP libdsp532y.dlb
#define SFTFLT libsftflt532y.dlb
#else
#define LIBM3 libm3free532.dlb
#define LIBDSP libdsp532.dlb
#define SFTFLT libsftflt532.dlb
#endif	/* } */
#endif	/* } */

#ifdef IEEEFP	/* { */
#define FPLIBS SFTFLT, FLT64, LIBDSP
#else
#define FPLIBS FLT64, LIBDSP, SFTFLT
#endif	/* } */

#ifdef __WORKAROUNDS_ENABLED
#ifdef _DINKUM_IO
#define LIBC libc532y.dlb, librt_fileio532y.dlb, libio532y.dlb,
#else //_DINKUM_IO
#define LIBC libio532y.dlb, libc532y.dlb,
#endif
#else //__WORKAROUNDS_ENABLED
#ifdef _DINKUM_IO
#define LIBC libc532.dlb, librt_fileio532.dlb, libio532.dlb,
#else //_DINKUM_IO
#define LIBC libio532.dlb, libc532.dlb,
#endif
#endif

#ifdef __WORKAROUNDS_ENABLED	/* { */
#ifdef __ADI_LIBEH__
#define LIBS LIBSMALL MEMINIT LIBC LIBM3, libevent532y.dlb, libx532y.dlb, libcpp532yx.dlb, libcpprt532yx.dlb, FPLIBS, libetsi532y.dlb, libssl532y.dlb, libdrv532y.dlb, OMEGA
#else
#define LIBS LIBSMALL MEMINIT LIBC LIBM3, libevent532y.dlb, libx532y.dlb, libcpp532y.dlb, libcpprt532y.dlb, FPLIBS, libetsi532y.dlb, libssl532y.dlb, libdrv532y.dlb, OMEGA
#endif
#else
#ifdef __ADI_LIBEH__
#define LIBS LIBSMALL MEMINIT LIBC LIBM3, libevent532.dlb, libx532.dlb, libcpp532x.dlb, libcpprt532x.dlb, FPLIBS, libetsi532.dlb, libssl532.dlb, libdrv532.dlb, OMEGA
#else
#define LIBS LIBSMALL MEMINIT LIBC LIBM3, libevent532.dlb, libx532.dlb,  libcpp532.dlb, libcpprt532.dlb, FPLIBS, libetsi532.dlb, libssl532.dlb, libdrv532.dlb, OMEGA
#endif
#endif	/* } */
#if defined(USE_FILEIO) || defined(USE_PROFGUIDE)
#ifdef __WORKAROUNDS_ENABLED	/* { */
$LIBRARIES = LIBS, librt_fileio532y.dlb;
#else
$LIBRARIES = LIBS, librt_fileio532.dlb;
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
$LIBRARIES = LIBS, librt532y.dlb;
#else
$LIBRARIES = LIBS, librt532.dlb;
#endif	/* } */
#endif	/* } */

// Libraries from the command line are included in COMMAND_LINE_OBJECTS.

// If USER_CRT is defined to be a custom/SystemBuilder generated
// CRT file then link with that, otherwise determine which of the
// precompiled objects to use.
#ifdef USER_CRT /* { */
#ifdef __WORKAROUNDS_ENABLED /* { */
#define CRT USER_CRT, libprofile532y.dlb PROFFLAG
#else
#define CRT USER_CRT, libprofile532.dlb PROFFLAG
#endif /* } */
#else
#ifdef USE_PROFILER	/* { */
#ifdef USE_FILEIO	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtsfpc532y.doj, libprofile532y.dlb PROFFLAG
#else
#define CRT crtsfpc532.doj, libprofile532.dlb PROFFLAG
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtscp532y.doj, libprofile532y.dlb PROFFLAG
#else
#define CRT crtscp532.doj, libprofile532.dlb PROFFLAG
#endif	/* } */
#endif  /* USE_FILEIO */	/* } */
#else
#ifdef USE_FILEIO	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT  crtsfc532y.doj
#else
#define CRT  crtsfc532.doj
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT  crtsc532y.doj
#else
#define CRT  crtsc532.doj
#endif	/* } */
#endif  /* USE_FILEIO */	/* } */
#endif  /* USE_PROFILER */	/* } */
#endif /* USER_CRT } */

#ifdef __WORKAROUNDS_ENABLED	/* { */
#define ENDCRT , crtn532y.doj
#else
#define ENDCRT , crtn532.doj
#endif	/* } */

$OBJECTS = CRT, $COMMAND_LINE_OBJECTS ,cplbtab533.doj ENDCRT;

MEMORY
{
MEM_SYS_MMRS  {	/* System memory-mapped registers - 2MB */
	TYPE(RAM) WIDTH(8)
	START(0xFFC00000) END(0xFFDFFFFF)
}
MEM_L1_SCRATCH  {
	TYPE(RAM) WIDTH(8)
	START(0xFFB00000) END(0xFFB00FFF)
}
/* Instruction SRAM, 80K, some useable as cache */
MEM_L1_CODE_CACHE {	/* L1 Instruction SRAM/Cache - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFFA10000) END(0xFFA13FFF)
}
MEM_L1_CODE {	/* L1 Instruction - 64K */
	TYPE(RAM) WIDTH(8)
	START(0xFFA00000) END(0xFFA0FFFF)
}
/* Data Bank B - 32K, half usable as cache. */
/* Split into sections for program layout. */
/* Data - normal data, 16K */
#if DATAB_CACHE /* { */
MEM_L1_DATA_B_CACHE	{	/* L1 Data B SRAM/Cache - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF904000) END(0xFF907FFF)
}
MEM_L1_DATA_B       {	/* L1 Data B SRAM - half of 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF902000) END(0xFF903FFF)
}
#else /*  } { USE_CACHE */
MEM_L1_DATA_B       {	/* L1 Data B SRAM - half of 16K + 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF902000) END(0xFF907FFF)
}
#endif /* } USE_CACHE */

/* Stack - 8K
** 0xFF900000-0xFF90000F used by boot-loader for 0.1 silicon. 
** Does not impact use as stack.
*/
MEM_L1_DATA_B_STACK       {	/* L1 Data B SRAM cont. - other half of 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF900000)	END(0xFF901FFF)
}

/* Data Bank A - 32K, half usable as cache. */
/* Split into sections for program layout. */
/* Data - normal data, 16K. */
/* If cache disabled use MEM_L1_DATA_A_CACHE for heap else use SRAM 
** 0xFF807FDF-0xFF807FFF used by boot-loader for 0.2 silicon.