/*
*********************************************************************************************************
*                                                uC/OS-II
*                                          The Real-Time Kernel
*
*										CPU specific functions for
*											  Analog Devices
*											Blackfin ADSP-BF533
*
* File : Driv_BF533_Asm.s
* By   : Ron Territo   ron@territocomputerservices.com
*********************************************************************************************************

Copyright...

This code is placed in the public domain, and can be distributed freely with no restrictions provided that the heading
of each source module file is not modified to remove the credit to the original author.
  
Disclaimer...

This program code is provided "as is". There is no warranty, either expressed or implied as to its fitness for use in
any application. It is provided only as an example of porting the MicroC/OS operating system to the Blackfin processor.
Its use is strictly at the risk of the user. The author will not be liable for any damages direct or consequential related
to the use of this software including, but not limited to loss of profit.

*/


#include <cdefBF533.h>
.import "uCOS-II_V2.70\source\ucos_ii.h"
/*
*****************************************************************************
*
*	Global variables
*
*****************************************************************************
*/

.extern _OSIntNesting;

.global _GlobalIrqMask;

.section data1;

.var _GlobalIrqMask = 0x1f;		// this is the default amsk for BF533


.section program;

/*
*****************************************************************************
*
*               CPU Initialization
*
*  	This function is called to initialize the state of the CPU at Reset
*
*
* Arguments  : none
*
*****************************************************************************
*/

.global _CpuInit;

_CpuInit:
	
	rts;
_CpuInit.end:	



/*
*********************************************************************************************************
*
*                CPU Save & Restore Register Context
*
* Description: 	These functions  are called to save and restore the register context of the CPU. 
*
*				CpuSaveContext() could be called from within ( at entry to ) an interrupt handler. It is
*				the responsibility of the interrupt handler to save the  RETI, RETS, FP, and ASTAT registers prior
*				to calling this function. 
*
*				CpuRestoreContext() should be called when the interrupt service has completed its processing
*				before restoring the FP, RETI, RETS, and ASTAT registers.
*
*				In both cases the RETS contains the return	from this function back to the interrupt handler.
*
*
* Arguments  : none
*
*********************************************************************************************************
*/

/*------------------------*/
/*   Save Context		  */
/*------------------------*/

.global _CpuSaveContext;

_CpuSaveContext:
	[--sp] = (r7:0);		// Save all data and pointer registers
	[--sp] = (p5:0);
	[--sp] = a0.W;			// Save accumulators ( 40 bit )
	[--sp] = a0.X;
	[--sp] = a1.W;
	[--sp] = a1.X;
	[--sp] = i0;			// save loop control registers
	[--sp] = i1;
	[--sp] = i2;
	[--sp] = i3;
	[--sp] = b0;
	[--sp] = b1;
	[--sp] = b2;
	[--sp] = b3;
	[--sp] = l0;
	[--sp] = l1;
	[--sp] = l2;
	[--sp] = l3;
	[--sp] = m0;
	[--sp] = m1;
	[--sp] = m2;
	[--sp] = m3;
	[--sp] = lc0;			// save fast loop control registers
	[--sp] = lc1;
	[--sp] = lt0;
	[--sp] = lt1;
	[--sp] = lb0;
	[--sp] = lb1;
	rts;
_CpuSaveContext.end:	


/*------------------------*/
/*   Restore Context	  */
/*------------------------*/

.global _CpuRestoreContext;

_CpuRestoreContext:
	lb1 = [sp++];
	lb0 = [sp++];
	lt1 = [sp++];
	lt0 = [sp++];
	lc1 = [sp++];
	lc0 = [sp++];
	m3 = [sp++];
	m2 = [sp++];
	m1 = [sp++];
	m0 = [sp++];
	l3 = [sp++];
	l2 = [sp++];
	l1 = [sp++];
	l0 = [sp++];
	b3 = [sp++];
	b2 = [sp++];
	b1 = [sp++];
	b0 = [sp++];
	i3 = [sp++];
	i2 = [sp++];
	i1 = [sp++];
	i0 = [sp++];
	a1.X = [sp++];
	a1.W = [sp++];
	a0.X = [sp++];
	a0.W = [sp++];
	(p5:0) = [sp++];
	(r7:0) = [sp++];
	rts;

_CpuRestoreContext.end:



/*
*********************************************************************************************************
*
*                CPU Interrupts Off/On
*
* Description: 	These functions are called to protect critical non-interruptable code sections. 
*
*				The calls must be balanced such that each CpuIrqOff() is matched with a CpuIrqOn().
*				Calls to CpuIrqOn() / CpuIrqOff() can be nested; the final CpuIrqOff() will enable
*				the IRQ.
*
*				Note 1.. 	While IRQs are turned off, any change to IMASK must also be made to the 
*							global variable GlobalIrqMask.
*				Note 2.. 	This function must only be called from Supervisor Mode
*
* Arguments  : none
*
*********************************************************************************************************
*/

/*------------------------*/
/* Enter Critical Section */
/*------------------------*/

.global _CpuIrqOff;

_CpuIrqOff:
	cli r2;						// get current IMASK and clear it ( disable IRQs )
	r2 = 1;
	r2 <<=14;
	sti r2;						// allow only S/W trap 14
	rts;
_CpuIrqOff.end:


/*------------------------*/
/* Exit Critical Section */
/*------------------------*/

.global _CpuIrqOn;

_CpuIrqOn:
	p2.h = _OSIntNesting;		// load p3 with pointer to Global IRQ Nested Level
	p2.l = _OSIntNesting;
	r2 = [ p2 ];				// get its current value
	cc = r2 == 0;				// is it 0 already?
	if !cc jump __CpuIrqOn1;
	p2.h = _GlobalIrqMask;		// get desired IRQ mask
	p2.l = _GlobalIrqMask;
	r2 = [ p2 ];
__CpuIrqOn1:
	BITSET(r2,6);
	sti r2;						// restore IRQs with mask from global variable
	rts;
_CpuIrqOn.end:			
	



/*
*********************************************************************************************************
*
*               Enable Event 
*
* Description: 	This function enables an exception event handler 
*
* Arguments  : 	arg 1  (r0) = exception mask bit
*
*********************************************************************************************************
*/

.global _CpuEnableEvent;

_CpuEnableEvent:
	[ --sp ] = rets;
	[ --sp ] = r0;
	call _CpuIrqOff;
	p2.h = _GlobalIrqMask;		// get global IRQ mask
	p2.l = _GlobalIrqMask;

	r2 = [ p2 ];
	r0 = [ sp++ ];
	r1 = r2 | r0;				// add the desired bit to mask
	[ p2 ] = r1;
	call _CpuIrqOn;
	rets = [ sp++ ];
	rts;
_CpuEnableEvent.end:	


/*
*********************************************************************************************************
*
*               Register Event Handler
*
* Description: 	This function registers an exception event handler 
*
* Arguments  : 	arg 1  (r0) = exception number
*				arg 2  (r1) = address of handler function
*
*********************************************************************************************************
*/

.global _CpuRegisterEventHandler;

_CpuRegisterEventHandler:

	p0.H = (EVT0 >>16);				// address of start of Event Vector table
	p0.L = (EVT0 &0xFFFF);
	
	p1 = r0;
	p2 = p0 + ( p1 <<2 );			// address of target vector = start + ( number * 4 )
	
	[p2] = r1;						// store the handler there
	
	rts;
	
_CpuRegisterEventHandler.end:




/*
*********************************************************************************************************
*
*               Enable Peripheral Device Interrupt 
*
* Description: 	This function enables a peripheral interrupt 
*
* Arguments  : 	arg 1  (r0) = exception mask bit
*
*********************************************************************************************************
*/

.global _CpuEnableInterrupt;

_CpuEnableInterrupt:
	[ --sp ] = rets;
	[ --sp ] = r0;
	call _CpuIrqOff;
	p2.h = (SIC_IMASK >>16) & 0xFFFF;
	p2.l = SIC_IMASK & 0xFFFF;
	r1 = W [ p2 ] (Z);
	r0 = [ sp++ ];
	r1 = r1 | r0;
	W [ p2 ] = r1;
	call _CpuIrqOn;
	rets = [ sp++ ];
	rts;
_CpuEnableInterrupt.end: