#ifndef FLEXCAN_H
#define FLEXCAN_H
/******************************************************************************
*
*       COPYRIGHT 2002 MOTOROLA, ALL RIGHTS RESERVED
*
*       The code is the property of Motorola St.Petersburg Software Development
*       and is Motorola Confidential Proprietary Information.
*
*       The copyright notice above does not evidence any
*       actual or intended publication of such source code.
*
* Functions:    
*
* Description:     
*
* Notes:        
*
******************************************************************************/

#ifdef __cplusplus
extern "C" {
#endif

#include "arch.h"
#include "can.h"



/****************************************************************************************/

/* Masks of CODE for MB Control/Status register */
#define FC_MB_NOTACTIVE     0x00
#define FC_MB_ACTIVE        0x40
#define FC_MB_FULL          0x20
#define FC_MB_OVERRUN       0x60
#define FC_MB_BUSY          0x10
#define FC_MB_NOTREADY      0x80
#define FC_MB_SEND          0xC0
#define FC_MB_REMOTEFRAME   0xA0
#define FC_MB_SEND_RF_DATA  0xE0



/* Get Rx Error Counter ( 8-bit value of Rx Error Counter  ) */
#define ioctlCAN_GET_RX_ERR_CNT(h, p)  ( h, pArchIO.CAN.ErrorCounterReg) >> 8 )

/* Get Tx Error Counter (  8-bit value of Tx Error Counter ) */
#define ioctlCAN_GET_TX_ERR_CNT(h, p)  ( h, pArchIO.CAN.ErrorCounterReg) & 0x00FF )

/* Get free running timer value ( 16-bit value of Timer ) */
#define ioctlCAN_GET_TIMER(h, p)  periphMemRead(&ArchIO.CAN.TimerReg)

/*  Shut down FlexCAN clocks */
#define ioctlCAN_GET_STOP(h, p)   periphBitSet(0x8000, &ArchIO.CAN.ConfigReg)

/* DEBUG mode */
#define ioctlCAN_SET_DEBUG(h, p)  periphBitSet(0x5000, &ArchIO.CAN.ConfigReg)

/* Enable FlexCAN clocks to be running */
#define ioctlCAN_RUN(h, p)  periphBitClear(0xF000, &ArchIO.CAN.ConfigReg )

/* Soft reset */
#define ioctlCAN_STOP(h, p)  periphBitSet(0x0200, &ArchIO.CAN.ConfigReg)

/* Listen only mode if value != 0, Normal mode if value = 0 */
#define ioctlCAN_SET_LISTEN_ONLY( h,  value ) \
    ( value ? ( periphBitSet(0x0008, &ArchIO.CAN.Control0Reg) ) \
            : ( periphBitClear(0x0008, &ArchIO.CAN.Control0Reg)  ) )

/* Power save mode if value != 0, Normal mode if value = 0 */
#define ioctlCAN_SET_POWER_SAVE( h, value ) \
    ( value ? ( periphBitSet(0x0020, &ArchIO.CAN.ConfigReg )   ) \
            : ( periphBitClear(0x0020, &ArchIO.CAN.ConfigReg ) ) )



/*** FlexCAN Masks for registers ***/

/* FCMCR0 - Module Configuration Register */
#define CAN_STOP        0x8000  /* stop FlexCAN clocks */
#define CAN_FRZ1        0x4000  /* FlexCAN response to the HALT */
#define CAN_HALT        0x1000  /* Halt FlexCAN Sclock */
#define CAN_NOT_RDY     0x0800  /* FlexCAN not ready */
#define CAN_WAKE_MASK   0x0400  /* FlexCAN wake up interrupt mask */
#define CAN_SOFT_RST    0x0200  /* Soft Reset */ 
#define CAN_FREEZ_ACK   0x0100  /* FlexCAN disabled */
#define CAN_SELF_WAKE   0x0040  /* Self Wake up */
#define CAN_PWR_SAVE    0x0020  /* Auto power save */
#define CAN_STOP_ACK    0x0010  /* FlexCAN stopped */

/* FCCTL0 -  Control Register 0 */
#define CAN_BUSOFF_MASK 0x8000  /* FlexCAN bus off interrupt mask */
#define CAN_ERROR_MASK  0x4000  /* FlexCAN error interrupt mask */
#define CAN_SAMP        0x0080  /* Sampling Mode */
#define CAN_LOOPB       0x0040  /* Loop Back Self Test mode */
#define CAN_TSYNC       0x0020  /* Timer Synchronization Mode */
#define CAN_LBUF        0x0010  /* Lowest buffer transmitted first */
#define CAN_LOM         0x0008  /* Listen Only Mode */

/* FCSTATUS - Error & Status register */
#define CAN_WAKEINT     0x0001
#define CAN_ERRINT      0x0002
#define CAN_BOFFINT     0x0004
#define CAN_ERRPASSIVE  0x0010
#define CAN_BOFF        0x0020
#define CAN_CONFINE     0x0030
#define CAN_TXRX        0x0040
#define CAN_IDLE        0x0080
#define CAN_RXWARN      0x0100
#define CAN_TXWARN      0x0200
#define CAN_STUFF_ERR   0x0400
#define CAN_FORM_ERR    0x0800
#define CAN_CRC_ERR     0x1000
#define CAN_ACK_ERR     0x2000
#define CAN_BIT0_ERR    0x4000
#define CAN_BIT1_ERR    0x8000

    


/* general masks and register */
#define CAN_SHORT_IDE_MASK  0x0008  /* mask for 29/11 address mode */
#define CAN_SHORT_SRR_MASK  0x0010  /* mask for transmit buffer mode */
#define CAN_LONG_IDE_MASK   0x00080000  /* long mask for 29/11 address mode */
#define CAN_LONG_SRR_MASK   0x00100000  /* long mask for transmit buffer mode */


typedef unsigned long CANADDRESSTYPE;     /* CAN ID address type */


typedef struct                              /* message buffer for receiving */
{
    io_sInterface *         drvInterface;
    CANADDRESSTYPE          canID;
    unsigned int            flags;          /* current status */
    void (*callback)();
}can_sBuffer;


enum FlexCANDeviceEnum
{

    sFlexCAN_size = sizeof(can_sBuffer),
    sFlexCAN_word_size = sizeof(can_sBuffer) / 2 ,
    sFlexCAN_size_callback   = sizeof( ((can_sBuffer*)0)->callback ),
    sFlexCAN_offset_canID 		= (int)&((can_sBuffer*)0)->canID,
    sFlexCAN_offset_flags 		= (int)&((can_sBuffer*)0)->flags,
    sFlexCAN_offset_callback    = (int)&((can_sBuffer*)0)->callback,
};


typedef struct               			/* flexcan initializing structure */  
{
    UWord16  TxSize;                    /* max number of Tx buffers */ 
    can_pRawCallBack pRawCallBack;      /* custom callback */
    UWord16 regFCMCR;                   /* Module Configuration Register */
    UWord16 regFCCTL0;                  /* Control Register 0 */
    UWord16 regFCCTL1;                  /* Control Register 1 */
} can_sInitialState;

typedef const struct 
{
	ssize_t  (*pRead)(handle_t hndl, void *buf, size_t);
	ssize_t  (*pWrite)(handle_t hndl, const void *buf, size_t len);
	int      (*pClose)(handle_t hndl);
	unsigned int  (*pIoctl[5])(handle_t hndl, unsigned long params );
} io_sFLEXCANInterface;


/****************** PROTOTYPES OF FUNCTIONS *********************/
void FC_Init();
void SetCANID( volatile unsigned short* pAddr, CANADDRESSTYPE canID, unsigned long addr_flags );
CANADDRESSTYPE GetCANID( unsigned long id );
int CheckCANID( CANADDRESSTYPE canID, unsigned int mode );
void FC_InitCallBack( CANADDRESSTYPE mask, CANADDRESSTYPE canID );
void CANReceiveISR(void);
unsigned int GetRxStatus( can_sBuffer* pbuf );
unsigned int GetTxStatus( can_sBuffer* pbuf );
void PrepareCANID( can_sBuffer* pbuf, unsigned int cmd );

handle_t  flexcanPreOpen(const char * pName, int oFlags, ...);
handle_t  flexcanOpen(const char * pName, int oFlags, CANADDRESSTYPE canID );
ssize_t flexcanWrite( handle_t handle,  const void *pBuffer, size_t size);
ssize_t flexcanRead( handle_t handle,  void *pBuffer, size_t size);
int flexcanClose( handle_t handle );
void CANBufferISR(void);

unsigned int ioctlCAN_RESET       (handle_t FileDesc, unsigned long params );
unsigned int ioctlCAN_SET_SLEEP   (handle_t FileDesc, unsigned long params );
unsigned int ioctlCAN_SET_WAKEUP  (handle_t FileDesc, unsigned long params );
unsigned int ioctlCAN_GET_STATUS  (handle_t FileDesc, unsigned long params );
unsigned int ioctlCANID_GET_STATUS(handle_t FileDesc, unsigned long params );
unsigned int ioctlCANID_SET_MASK  (handle_t FileDesc, unsigned long params );      



#define    CAN_BUF_READ_HANDLE   0x0100
#define    CAN_BUF_SYNCHRONOUS   0x0200
#define    CAN_BUF_2B            0x0400


#ifdef __cplusplus
}
#endif

#endif /* FLEXCAN_H */