An&nbsp;increasingly&nbsp;common&nbsp;hardware&nbsp;design&nbsp;methodology&nbsp;in&nbsp;which&nbsp;I/O&nbsp;devices&nbsp;are&nbsp;<br />placed&nbsp;into&nbsp;the&nbsp;memory&nbsp;space&nbsp;rather&nbsp;than&nbsp;the&nbsp;I/O&nbsp;space.&nbsp;From&nbsp;the&nbsp;processor's&nbsp;<br />&nbsp;<br />point&nbsp;of&nbsp;view,&nbsp;memory-mapped&nbsp;I/O&nbsp;devices&nbsp;look&nbsp;very&nbsp;much&nbsp;like&nbsp;memory&nbsp;devices.&nbsp;<br />&nbsp;<br />memory&nbsp;space&nbsp;<br />A&nbsp;processor's&nbsp;standard&nbsp;address&nbsp;space.&nbsp;Contrast&nbsp;with&nbsp;I/O&nbsp;space.&nbsp;<br />microcontroller&nbsp;<br />A&nbsp;microcontroller&nbsp;is&nbsp;very&nbsp;similar&nbsp;to&nbsp;a&nbsp;microprocessor.&nbsp;The&nbsp;main&nbsp;difference&nbsp;i&nbsp;<br />s&nbsp;that&nbsp;<br />a&nbsp;microcontroller&nbsp;is&nbsp;designed&nbsp;specifically&nbsp;for&nbsp;use&nbsp;in&nbsp;embedded&nbsp;systems.&nbsp;<br />Microcontrollers&nbsp;typically&nbsp;include&nbsp;a&nbsp;CPU,&nbsp;memory&nbsp;(a&nbsp;small&nbsp;amount&nbsp;of&nbsp;RAM&nbsp;and/&nbsp;<br />or&nbsp;<br />ROM),&nbsp;and&nbsp;other&nbsp;peripherals&nbsp;on&nbsp;the&nbsp;same&nbsp;chip.&nbsp;Common&nbsp;examples&nbsp;are&nbsp;the&nbsp;8051,&nbsp;<br />Intel's&nbsp;80196,&nbsp;and&nbsp;Motorola's&nbsp;68HCxx&nbsp;series.&nbsp;<br />microprocessor&nbsp;<br />A&nbsp;piece&nbsp;of&nbsp;silicon&nbsp;containing&nbsp;a&nbsp;general-purpose&nbsp;CPU.&nbsp;The&nbsp;most&nbsp;common&nbsp;example&nbsp;<br />s&nbsp;<br />are&nbsp;Intel's&nbsp;80x86&nbsp;and&nbsp;Motorola's&nbsp;680x0&nbsp;families.&nbsp;<br />monitor&nbsp;<br />In&nbsp;the&nbsp;context&nbsp;of&nbsp;this&nbsp;book,&nbsp;a&nbsp;debug&nbsp;monitor.&nbsp;However,&nbsp;there&nbsp;is&nbsp;a&nbsp;second&nbsp;mea&nbsp;<br />ning&nbsp;<br />for&nbsp;this&nbsp;word&nbsp;that&nbsp;is&nbsp;associated&nbsp;with&nbsp;intertask&nbsp;communication.&nbsp;In&nbsp;that&nbsp;conte&nbsp;<br />xt,&nbsp;a&nbsp;<br />monitor&nbsp;is&nbsp;a&nbsp;language-level&nbsp;synchronization&nbsp;feature.&nbsp;<br />multiprocessing&nbsp;<br />The&nbsp;use&nbsp;of&nbsp;more&nbsp;than&nbsp;one&nbsp;processor&nbsp;in&nbsp;a&nbsp;single&nbsp;computer&nbsp;system.&nbsp;So-called&nbsp;<br />&quot;multiprocessor&nbsp;systems&quot;&nbsp;usually&nbsp;have&nbsp;a&nbsp;common&nbsp;memory&nbsp;space&nbsp;through&nbsp;which&nbsp;th&nbsp;<br />e&nbsp;<br />processors&nbsp;can&nbsp;communicate&nbsp;and&nbsp;share&nbsp;data.&nbsp;In&nbsp;addition,&nbsp;some&nbsp;multiprocessor&nbsp;<br />systems&nbsp;support&nbsp;parallel&nbsp;processing.&nbsp;<br />multitasking&nbsp;<br />The&nbsp;execution&nbsp;of&nbsp;multiple&nbsp;software&nbsp;routines&nbsp;in&nbsp;pseudo-parallel.&nbsp;Each&nbsp;routine&nbsp;<br />&nbsp;<br />represents&nbsp;a&nbsp;separate&nbsp;&quot;thread&nbsp;of&nbsp;execution&quot;&nbsp;and&nbsp;is&nbsp;referred&nbsp;to&nbsp;as&nbsp;a&nbsp;task.&nbsp;Th&nbsp;<br />e&nbsp;<br />operating&nbsp;system&nbsp;is&nbsp;responsible&nbsp;for&nbsp;simulating&nbsp;parallelism&nbsp;by&nbsp;parceling&nbsp;out&nbsp;&nbsp;<br />the&nbsp;<br />processor's&nbsp;time.&nbsp;<br />mutex&nbsp;<br />A&nbsp;data&nbsp;structure&nbsp;for&nbsp;mutual&nbsp;exclusion,&nbsp;also&nbsp;known&nbsp;as&nbsp;a&nbsp;binary&nbsp;semaphore.&nbsp;A&nbsp;m&nbsp;<br />utex&nbsp;<br />is&nbsp;basically&nbsp;just&nbsp;a&nbsp;multitasking-aware&nbsp;binary&nbsp;flag&nbsp;that&nbsp;can&nbsp;be&nbsp;used&nbsp;to&nbsp;synch&nbsp;<br />ronize&nbsp;<br />the&nbsp;activities&nbsp;of&nbsp;multiple&nbsp;tasks.&nbsp;As&nbsp;such,&nbsp;it&nbsp;can&nbsp;be&nbsp;used&nbsp;to&nbsp;protect&nbsp;critica&nbsp;<br />l&nbsp;sections&nbsp;<br />of&nbsp;the&nbsp;code&nbsp;from&nbsp;interruption&nbsp;and&nbsp;shared&nbsp;resources&nbsp;from&nbsp;simultaneous&nbsp;use.&nbsp;<br />mutual&nbsp;exclusion&nbsp;<br />A&nbsp;guarantee&nbsp;of&nbsp;exclusive&nbsp;access&nbsp;to&nbsp;a&nbsp;shared&nbsp;resource.&nbsp;In&nbsp;embedded&nbsp;systems,&nbsp;t&nbsp;<br />he&nbsp;<br />shared&nbsp;resource&nbsp;is&nbsp;typically&nbsp;a&nbsp;block&nbsp;of&nbsp;memory,&nbsp;a&nbsp;global&nbsp;variable,&nbsp;or&nbsp;a&nbsp;set&nbsp;&nbsp;<br />of&nbsp;<br />registers.&nbsp;Mutual&nbsp;exclusion&nbsp;can&nbsp;be&nbsp;achieved&nbsp;with&nbsp;the&nbsp;use&nbsp;of&nbsp;a&nbsp;semaphore&nbsp;or&nbsp;m&nbsp;<br />utex.&nbsp;<br />N&nbsp;<br />NVRAM&nbsp;<br />Non-Volatile&nbsp;Random-Access&nbsp;Memory.&nbsp;A&nbsp;type&nbsp;of&nbsp;RAM&nbsp;that&nbsp;retains&nbsp;its&nbsp;data&nbsp;even&nbsp;<br />when&nbsp;the&nbsp;system&nbsp;is&nbsp;powered&nbsp;down.&nbsp;NVRAM&nbsp;frequently&nbsp;consists&nbsp;of&nbsp;an&nbsp;SRAM&nbsp;and&nbsp;a&nbsp;<br />long-life&nbsp;battery.&nbsp;<br />O&nbsp;<br />OTP&nbsp;<br />See&nbsp;one-time&nbsp;programmable.&nbsp;<br />object&nbsp;code&nbsp;<br />A&nbsp;set&nbsp;of&nbsp;processor-readable&nbsp;opcodes&nbsp;and&nbsp;data.&nbsp;The&nbsp;output&nbsp;of&nbsp;compilers,&nbsp;<br />assemblers,&nbsp;linkers,&nbsp;and&nbsp;locators&nbsp;are&nbsp;files&nbsp;containing&nbsp;object&nbsp;code.&nbsp;<br />object&nbsp;file&nbsp;<br />A&nbsp;file&nbsp;containing&nbsp;object&nbsp;code.&nbsp;The&nbsp;output&nbsp;of&nbsp;a&nbsp;compiler&nbsp;or&nbsp;assembler.&nbsp;<br />one-time&nbsp;programmable&nbsp;<br />Any&nbsp;programmable&nbsp;device,&nbsp;like&nbsp;a&nbsp;PROM,&nbsp;that&nbsp;can&nbsp;be&nbsp;programmed&nbsp;just&nbsp;once&nbsp;by&nbsp;th&nbsp;<br />e&nbsp;<br />end&nbsp;user.&nbsp;However,&nbsp;this&nbsp;term&nbsp;is&nbsp;used&nbsp;almost&nbsp;exclusively&nbsp;to&nbsp;refer&nbsp;to&nbsp;<br />microcontrollers&nbsp;with&nbsp;on-chip&nbsp;PROM.&nbsp;<br />opcode&nbsp;<br />A&nbsp;sequence&nbsp;of&nbsp;bits&nbsp;that&nbsp;is&nbsp;recognized&nbsp;by&nbsp;the&nbsp;processor&nbsp;as&nbsp;one&nbsp;of&nbsp;the&nbsp;instruc&nbsp;<br />tions&nbsp;<br />in&nbsp;its&nbsp;instruction&nbsp;set.&nbsp;<br />operating&nbsp;system&nbsp;<br />A&nbsp;piece&nbsp;of&nbsp;software&nbsp;that&nbsp;makes&nbsp;multitasking&nbsp;possible.&nbsp;An&nbsp;operating&nbsp;system&nbsp;<br />typically&nbsp;consists&nbsp;of&nbsp;a&nbsp;set&nbsp;of&nbsp;function&nbsp;calls,&nbsp;or&nbsp;software&nbsp;interrupts,&nbsp;and&nbsp;a&nbsp;<br />&nbsp;periodic&nbsp;<br />clock&nbsp;tick.&nbsp;The&nbsp;operating&nbsp;system&nbsp;is&nbsp;responsible&nbsp;for&nbsp;deciding&nbsp;which&nbsp;task&nbsp;shou&nbsp;<br />ld&nbsp;be&nbsp;<br />using&nbsp;the&nbsp;processor&nbsp;at&nbsp;a&nbsp;given&nbsp;time&nbsp;and&nbsp;for&nbsp;controlling&nbsp;access&nbsp;to&nbsp;shared&nbsp;res&nbsp;<br />ources.&nbsp;<br />oscilloscope&nbsp;<br />A&nbsp;hardware&nbsp;debugging&nbsp;tool&nbsp;that&nbsp;allows&nbsp;you&nbsp;to&nbsp;view&nbsp;the&nbsp;voltage&nbsp;on&nbsp;one&nbsp;or&nbsp;more&nbsp;<br />&nbsp;<br />electrical&nbsp;lines.&nbsp;For&nbsp;example,&nbsp;you&nbsp;might&nbsp;use&nbsp;an&nbsp;oscilloscope&nbsp;to&nbsp;determine&nbsp;if&nbsp;<br />&nbsp;a&nbsp;<br />particular&nbsp;interrupt&nbsp;is&nbsp;currently&nbsp;asserted.&nbsp;<br />P&nbsp;<br />PROM&nbsp;<br />Programmable&nbsp;Read-Only&nbsp;Memory.&nbsp;A&nbsp;type&nbsp;of&nbsp;ROM&nbsp;that&nbsp;can&nbsp;be&nbsp;written&nbsp;<br />(programmed)&nbsp;with&nbsp;a&nbsp;device&nbsp;programmer.&nbsp;These&nbsp;memory&nbsp;devices&nbsp;can&nbsp;be&nbsp;<br />programmed&nbsp;only&nbsp;once,&nbsp;so&nbsp;they&nbsp;are&nbsp;sometimes&nbsp;referred&nbsp;to&nbsp;as&nbsp;write-once&nbsp;or&nbsp;<br />one-time&nbsp;programmable&nbsp;devices.&nbsp;<br />parallel&nbsp;processing&nbsp;<br />The&nbsp;ability&nbsp;to&nbsp;apply&nbsp;two&nbsp;or&nbsp;more&nbsp;processors&nbsp;to&nbsp;a&nbsp;single&nbsp;computation.&nbsp;<br />peripheral&nbsp;<br />A&nbsp;piece&nbsp;of&nbsp;hardware&nbsp;other&nbsp;than&nbsp;the&nbsp;processor,&nbsp;usually&nbsp;memory&nbsp;or&nbsp;an&nbsp;I/O&nbsp;devic&nbsp;<br />e.&nbsp;<br />The&nbsp;peripheral&nbsp;may&nbsp;reside&nbsp;within&nbsp;the&nbsp;same&nbsp;chip&nbsp;as&nbsp;the&nbsp;processor,&nbsp;in&nbsp;which&nbsp;ca&nbsp;<br />se&nbsp;it&nbsp;<br />is&nbsp;called&nbsp;an&nbsp;internal&nbsp;peripheral.&nbsp;<br />physical&nbsp;address&nbsp;<br />The&nbsp;actual&nbsp;address&nbsp;that&nbsp;is&nbsp;placed&nbsp;on&nbsp;the&nbsp;address&nbsp;bus&nbsp;when&nbsp;accessing&nbsp;a&nbsp;memory&nbsp;<br />&nbsp;<br />location&nbsp;or&nbsp;register.&nbsp;<br />preemptive&nbsp;<br />A&nbsp;scheduler&nbsp;is&nbsp;said&nbsp;to&nbsp;be&nbsp;preemptive&nbsp;if&nbsp;it&nbsp;allows&nbsp;the&nbsp;running&nbsp;task&nbsp;to&nbsp;be&nbsp;sus&nbsp;<br />pended&nbsp;<br />when&nbsp;a&nbsp;higher-priority&nbsp;task&nbsp;becomes&nbsp;ready.&nbsp;Non-preemptive&nbsp;schedulers&nbsp;are&nbsp;eas&nbsp;<br />ier&nbsp;<br />to&nbsp;implement&nbsp;but&nbsp;less&nbsp;appropriate&nbsp;for&nbsp;embedded&nbsp;systems.&nbsp;<br />polling&nbsp;<br />A&nbsp;method&nbsp;of&nbsp;interfacing&nbsp;with&nbsp;hardware&nbsp;that&nbsp;involves&nbsp;repeatedly&nbsp;reading&nbsp;a&nbsp;sta&nbsp;<br />tus&nbsp;<br />register&nbsp;until&nbsp;the&nbsp;device&nbsp;has&nbsp;reached&nbsp;the&nbsp;awaited&nbsp;state.&nbsp;Device&nbsp;drivers&nbsp;are&nbsp;&nbsp;<br />either&nbsp;<br />polling&nbsp;or&nbsp;interrupt-driven,&nbsp;with&nbsp;the&nbsp;latter&nbsp;being&nbsp;more&nbsp;generally&nbsp;preferred.&nbsp;<br />&nbsp;<br />priority&nbsp;<br />The&nbsp;relative&nbsp;importance&nbsp;of&nbsp;one&nbsp;task&nbsp;compared&nbsp;to&nbsp;another.&nbsp;<br />priority&nbsp;inversion&nbsp;<br />An&nbsp;unwanted&nbsp;software&nbsp;situation&nbsp;in&nbsp;which&nbsp;a&nbsp;high-priority&nbsp;task&nbsp;is&nbsp;delayed&nbsp;whil&nbsp;<br />e&nbsp;<br />waiting&nbsp;for&nbsp;access&nbsp;to&nbsp;a&nbsp;shared&nbsp;resource&nbsp;that&nbsp;is&nbsp;not&nbsp;even&nbsp;being&nbsp;used&nbsp;at&nbsp;the&nbsp;t&nbsp;<br />ime.&nbsp;<br />For&nbsp;all&nbsp;practical&nbsp;purposes,&nbsp;the&nbsp;priority&nbsp;of&nbsp;this&nbsp;task&nbsp;has&nbsp;been&nbsp;lowered&nbsp;durin&nbsp;<br />g&nbsp;the&nbsp;<br />delay&nbsp;period.&nbsp;<br />process&nbsp;<br />A&nbsp;word&nbsp;that&nbsp;is&nbsp;often&nbsp;confused&nbsp;with&nbsp;task&nbsp;or&nbsp;thread.&nbsp;The&nbsp;crucial&nbsp;distinction&nbsp;i&nbsp;<br />s&nbsp;that&nbsp;<br />all&nbsp;of&nbsp;the&nbsp;tasks&nbsp;in&nbsp;a&nbsp;system&nbsp;share&nbsp;a&nbsp;common&nbsp;memory&nbsp;space.&nbsp;Processes,&nbsp;on&nbsp;the&nbsp;&nbsp;<br />other&nbsp;<br />hand,&nbsp;always&nbsp;have&nbsp;their&nbsp;own&nbsp;private&nbsp;memory&nbsp;space.&nbsp;Processes&nbsp;are&nbsp;common&nbsp;in&nbsp;<br />multi-user&nbsp;systems&nbsp;but&nbsp;are&nbsp;rarely,&nbsp;if&nbsp;ever,&nbsp;found&nbsp;in&nbsp;embedded&nbsp;systems.&nbsp;<br />processor&nbsp;<br />A&nbsp;generic&nbsp;term&nbsp;that&nbsp;does&nbsp;not&nbsp;distinguish&nbsp;between&nbsp;microprocessor,&nbsp;microcontro&nbsp;<br />ller,&nbsp;<br />and&nbsp;digital&nbsp;signal&nbsp;processor.&nbsp;<br />processor&nbsp;family&nbsp;<br />A&nbsp;set&nbsp;of&nbsp;related&nbsp;processors,&nbsp;usually&nbsp;successive&nbsp;generations&nbsp;from&nbsp;the&nbsp;same&nbsp;<br />manufacturer.&nbsp;For&nbsp;example,&nbsp;Intel's&nbsp;80x86&nbsp;family&nbsp;began&nbsp;with&nbsp;the&nbsp;8086&nbsp;and&nbsp;now&nbsp;<br />includes&nbsp;the&nbsp;80186,&nbsp;286,&nbsp;386,&nbsp;486,&nbsp;Pentium,&nbsp;and&nbsp;many&nbsp;others.&nbsp;The&nbsp;later&nbsp;model&nbsp;<br />s&nbsp;in&nbsp;a&nbsp;<br />family&nbsp;are&nbsp;typically&nbsp;backwards-compatible&nbsp;with&nbsp;the&nbsp;ones&nbsp;that&nbsp;came&nbsp;before.&nbsp;<br />processor-independent&nbsp;<br />A&nbsp;piece&nbsp;of&nbsp;software&nbsp;that&nbsp;is&nbsp;independent&nbsp;of&nbsp;the&nbsp;processor&nbsp;on&nbsp;which&nbsp;it&nbsp;will&nbsp;be&nbsp;<br />&nbsp;run.&nbsp;<br />Most&nbsp;programs&nbsp;that&nbsp;can&nbsp;be&nbsp;written&nbsp;in&nbsp;a&nbsp;high-level&nbsp;language&nbsp;are&nbsp;<br />processor-independent.&nbsp;Contrast&nbsp;with&nbsp;processor-specific.&nbsp;<br />processor-specific&nbsp;<br />A&nbsp;piece&nbsp;of&nbsp;software&nbsp;that&nbsp;is&nbsp;highly&nbsp;dependent&nbsp;on&nbsp;the&nbsp;processor&nbsp;on&nbsp;which&nbsp;it&nbsp;wi&nbsp;<br />ll&nbsp;be&nbsp;<br />run.&nbsp;Such&nbsp;code&nbsp;must&nbsp;usually&nbsp;be&nbsp;written&nbsp;in&nbsp;assembly&nbsp;language.&nbsp;Contrast&nbsp;with&nbsp;<br />processor-independent.&nbsp;<br />profiler&nbsp;<br />A&nbsp;software&nbsp;development&nbsp;tool&nbsp;that&nbsp;collects&nbsp;and&nbsp;reports&nbsp;execution&nbsp;statistics&nbsp;f&nbsp;<br />or&nbsp;<br />your&nbsp;programs.&nbsp;These&nbsp;statistics&nbsp;include&nbsp;the&nbsp;number&nbsp;of&nbsp;calls&nbsp;to&nbsp;each&nbsp;subrouti&nbsp;<br />ne&nbsp;and&nbsp;<br />the&nbsp;total&nbsp;amount&nbsp;of&nbsp;time&nbsp;spent&nbsp;within&nbsp;each.&nbsp;This&nbsp;data&nbsp;can&nbsp;be&nbsp;used&nbsp;to&nbsp;learn&nbsp;w&nbsp;<br />hich&nbsp;<br />subroutines&nbsp;are&nbsp;the&nbsp;most&nbsp;critical&nbsp;and,&nbsp;therefore,&nbsp;demand&nbsp;the&nbsp;greatest&nbsp;code&nbsp;<br />efficiency.&nbsp;<br />program&nbsp;counter&nbsp;<br />See&nbsp;instruction&nbsp;pointer.&nbsp;<br />R&nbsp;<br />RAM&nbsp;<br />Random-Access&nbsp;Memory.&nbsp;A&nbsp;broad&nbsp;classification&nbsp;of&nbsp;memory&nbsp;devices&nbsp;that&nbsp;includes&nbsp;<br />&nbsp;<br />all&nbsp;devices&nbsp;in&nbsp;which&nbsp;individual&nbsp;memory&nbsp;locations&nbsp;may&nbsp;be&nbsp;read&nbsp;or&nbsp;written&nbsp;as&nbsp;r&nbsp;<br />equired.&nbsp;<br />RISC&nbsp;<br />Reduced&nbsp;Instruction&nbsp;Set&nbsp;Computer.&nbsp;Describes&nbsp;the&nbsp;architecture&nbsp;of&nbsp;a&nbsp;processor&nbsp;<br />family.&nbsp;RISC&nbsp;processors&nbsp;generally&nbsp;feature&nbsp;fixed-length&nbsp;instructions,&nbsp;a&nbsp;load-&nbsp;<br />store&nbsp;<br />