designer = "Roland H鰈ler"company  = "OREGANO SYSTEMS"SYNOPSYS      = get_unix_variable("SYNOPSYS")search_path   = { . , \                  /home/mietec/ads98.1/cmos035/v1.8/syn98.2 , \                  SYNOPSYS + "/libraries/syn"}link_library = { "*" , MTC45000.db , MTC45000_WL_WORST.db }target_library = { MTC45000.db MTC45000_WL_WORST.db }symbol_library = { MTC45000.sdb}synthetic_library = {standard.sldb}define_design_lib work -path ./libbus_naming_style              = "%s<%d>"bus_dimension_separator_style = "><"bus_inference_style           = "%s<%d>"edifout_netlist_only                    = trueedifout_power_and_ground_representation = celledifout_write_properties_list           = {INIT IO LOC PWR_MODE PAD_LOCATION PART}edifout_no_array                        = true