?? q7230.fit.rpt
字號(hào):
; Q[0]~211 ; 6 ;
; rtl~560 ; 6 ;
; reduce_nor~33 ; 6 ;
; count[6] ; 5 ;
; Q[6]~235 ; 5 ;
; Q[5]~231 ; 5 ;
; reduce_nor~25 ; 5 ;
; CP_Q ; 4 ;
; G ; 3 ;
; count[7] ; 3 ;
; Q[7]~239 ; 3 ;
; NAB ; 2 ;
; D_Q ; 2 ;
; reduce_nor~17 ; 2 ;
; Din[7] ; 1 ;
; Din[6] ; 1 ;
; Din[5] ; 1 ;
; Din[3] ; 1 ;
; Din[2] ; 1 ;
; Din[4] ; 1 ;
; Din[1] ; 1 ;
; Din[0] ; 1 ;
; D ; 1 ;
; rtl~617 ; 1 ;
; reduce_nor~53 ; 1 ;
; reduce_nor~48 ; 1 ;
; reduce_nor~42 ; 1 ;
; reduce_nor~36 ; 1 ;
; reduce_nor~34 ; 1 ;
; D_Q~6 ; 1 ;
; CK~20 ; 1 ;
; CK~18 ; 1 ;
; rtl~607 ; 1 ;
; rtl~599 ; 1 ;
; rtl~591 ; 1 ;
+-------------------+-------------+
+-----------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+------------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+------------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 43 / 72 ( 59 % ) ;
+----------------------------+------------------+
+-----------------------------------------------------------------------+
; LAB Macrocells ;
+-----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 14.00) ; Number of LABs (Total = 2) ;
+-----------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 1 ;
; 13 ; 0 ;
; 14 ; 0 ;
; 15 ; 0 ;
; 16 ; 1 ;
+-----------------------------------------+-----------------------------+
+---------------------------------------------------------+
; Parallel Expander ;
+--------------------------+------------------------------+
; Parallel Expander Length ; Number of Parallel Expanders ;
+--------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 1 ;
; 2 ; 1 ;
; 3 ; 1 ;
+--------------------------+------------------------------+
+-------------------------------------------------------------------------------+
; Shareable Expander ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders (Average = 8.00) ; Number of LABs (Total = 2) ;
+-------------------------------------------------+-----------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 1 ;
; 8 ; 0 ;
; 9 ; 1 ;
+-------------------------------------------------+-----------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC1 ; reduce_nor~33, clr, count[0], count[1] ; count[1] ;
; A ; LC8 ; D, CK~20 ; DQ, D_Q~6 ;
; A ; LC3 ; CP_Q, NAB ; CK ;
; A ; LC11 ; CLK, CP_Q, G, reset, clr, reduce_nor~25, reduce_nor~33 ; CP_Q, NAA, CK~18, CK~20 ;
; A ; LC14 ; CLK, rtl~560, clr, count[7], count[6], count[5], count[4], count[3], count[2], count[0], count[1], rtl~607, reset, rtl~566 ; reduce_nor~33, count[7], reduce_nor~53 ;
; A ; LC15 ; CLK, rtl~560, clr, count[6], count[5], count[4], count[3], count[2], count[0], count[1], rtl~599, reset, rtl~566 ; count[6], rtl~607, count[7], reduce_nor~36, reduce_nor~42 ;
; A ; LC4 ; CLK, rtl~560, clr, count[5], count[4], count[3], count[2], count[0], count[1], rtl~591, reset, rtl~566 ; reduce_nor~26, reduce_nor~33, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~53 ;
; A ; LC5 ; CLK, rtl~560, clr, count[4], count[3], count[2], count[0], count[1], rtl~583, reset, rtl~566 ; reduce_nor~16, reduce_nor~25, count[4], rtl~591, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~34, reduce_nor~36 ;
; A ; LC6 ; CLK, rtl~560, clr, count[3], count[2], count[0], count[1], rtl~575, reset, rtl~566 ; reduce_nor~16, reduce_nor~18, reduce_nor~25, count[3], rtl~583, count[4], rtl~591, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~34, reduce_nor~36, reduce_nor~42 ;
; A ; LC7 ; CLK, rtl~560, clr, count[2], count[0], count[1], rtl~567, reset, rtl~566 ; reduce_nor~17, reduce_nor~25, count[2], rtl~575, count[3], rtl~583, count[4], rtl~591, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~36, reduce_nor~42 ;
; A ; LC2 ; CLK, rtl~617, reduce_nor~25, clr, count[0], count[1], reset, rtl~566, reduce_nor~33 ; reduce_nor~26, reduce_nor~27, count[1], rtl~567, count[2], rtl~575, count[3], rtl~583, count[4], rtl~591, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~48, reduce_nor~53, rtl~617 ;
; A ; LC9 ; CLK, clr, reduce_nor~25, count[0], reduce_nor~33, G, reset ; count[0], reduce_nor~26, reduce_nor~27, count[1], rtl~567, count[2], rtl~575, count[3], rtl~583, count[4], rtl~591, count[5], rtl~599, count[6], rtl~607, count[7], reduce_nor~48, reduce_nor~53, rtl~617 ;
; B ; LC21 ; reduce_nor~42, reduce_nor~17, Q[3]~227, count[3], reduce_nor~18, Q[4]~219, count[4], reduce_nor~19, Q[2]~223, count[2] ; count[0], rtl~560, rtl~566, CP_Q, count[1] ;
; B ; LC23 ; reduce_nor~48, count[0], Q[1]~215, count[1], count[5], Q[5]~231, count[7], Q[7]~239, Q[6]~235, Q[3]~227, Q[2]~223, Q[4]~219 ; reduce_nor~33 ;
; B ; LC22 ; count[0], Q[0]~211, Q[1]~215, count[1] ; reduce_nor~53 ;
; B ; LC20 ; reduce_nor~36, Q[0]~211, Q[1]~215, Q[2]~223, count[2], reduce_nor~16, count[6], Q[6]~235, reduce_nor~17, Q[3]~227, count[3] ; reduce_nor~25 ;
; B ; LC19 ; reduce_nor~34, Q[3]~227, Q[2]~223, count[2], count[3], Q[4]~219, count[4], count[6], Q[6]~235, Q[5]~231 ; reduce_nor~42 ;
; B ; LC18 ; Q[3]~227, Q[4]~219, count[3], count[4] ; reduce_nor~36 ;
; B ; LC17 ; D_Q ; NDQ ;
; B ; LC24 ; reduce_nor~53, Q[0]~211, count[5], Q[3]~227, Q[5]~231, Q[1]~215, Q[2]~223, Q[4]~219, reduce_nor~26, count[7], Q[7]~239, reduce_nor~27 ; count[0], rtl~560, rtl~566, CP_Q, count[1], rtl~617 ;
; B ; LC29 ; Q[0]~211, reset, Din[0], Q[0]$en_or~41sexp, OE ; reduce_nor~17, reduce_nor~19, reduce_nor~33, Q[0]~211, reduce_nor~42, reduce_nor~48 ;
; B ; LC30 ; Q[1]~215, Q[0]$en_or~41sexp, reset, OE, Din[1] ; reduce_nor~17, reduce_nor~19, reduce_nor~33, Q[1]~215, reduce_nor~42, reduce_nor~48, reduce_nor~53 ;
; B ; LC25 ; Q[4]~219, Q[0]$en_or~41sexp, reset, OE, Din[4] ; reduce_nor~25, reduce_nor~26, reduce_nor~27, reduce_nor~33, Q[4]~219, reduce_nor~34, reduce_nor~36, reduce_nor~53 ;
; B ; LC26 ; Q[2]~223, Q[0]$en_or~41sexp, reset, OE, Din[2] ; reduce_nor~25, reduce_nor~26, reduce_nor~27, reduce_nor~33, Q[2]~223, reduce_nor~36, reduce_nor~42, reduce_nor~53 ;
; B ; LC27 ; Q[7]~239, Q[0]$en_or~41sexp, reset, OE, Din[7] ; reduce_nor~33, Q[7]~239, reduce_nor~53 ;
; B ; LC28 ; Q[6]~235, Q[0]$en_or~41sexp, reset, OE, Din[6] ; reduce_nor~26, Q[6]~235, reduce_nor~36, reduce_nor~42, reduce_nor~53 ;
; B ; LC31 ; Q[5]~231, Q[0]$en_or~41sexp, reset, OE, Din[5] ; reduce_nor~16, reduce_nor~33, Q[5]~231, reduce_nor~36, reduce_nor~53 ;
; B ; LC32 ; Q[3]~227, Q[0]$en_or~41sexp, reset, OE, Din[3] ; reduce_nor~16, reduce_nor~18, reduce_nor~25, reduce_nor~26, reduce_nor~27, reduce_nor~33, Q[3]~227, reduce_nor~34, reduce_nor~36, reduce_nor~42, reduce_nor~53 ;
+-----+------------+---------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 4.2 Build 156 11/29/2004 SJ Web Edition
Info: Processing started: Wed Jan 04 09:38:41 2006
Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off Q7230 -c Q7230
Info: Selected device EPM3032ALC44-10 for design "Q7230"
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Wed Jan 04 09:38:45 2006
Info: Elapsed time: 00:00:05
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