/* * Definitions for the FTDI USB Single Port Serial Converter -  * known as FTDI_SIO (Serial Input/Output application of the chipset)  * * The example I have is known as the USC-1000 which is available from * http://www.dse.co.nz - cat no XH4214 It looks similar to this: * http://www.dansdata.com/usbser.htm but I can't be sure There are other * USC-1000s which don't look like my device though so beware! * * The device is based on the FTDI FT8U100AX chip. It has a DB25 on one side,  * USB on the other. * * Thanx to FTDI (http://www.ftdi.co.uk) for so kindly providing details * of the protocol required to talk to the device and ongoing assistence * during development. * * Bill Ryder - bryder@sgi.com formerly of Silicon Graphics, Inc.- wrote the  * FTDI_SIO implementation. * */#define FTDI_VID	0x0403	/* Vendor Id */#define FTDI_SIO_PID	0x8372	/* Product Id SIO application of 8U100AX  */#define FTDI_8U232AM_PID 0x6001 /* Similar device to SIO above */#define FTDI_NF_RIC_VID	0x0DCD	/* Vendor Id */#define FTDI_NF_RIC_PID	0x0001	/* Product Id *//* www.crystalfontz.com devices - thanx for providing free devices for evaluation ! *//* they use the ftdi chipset for the USB interface and the vendor id is the same */#define FTDI_XF_634_PID  0xFC09	/* Four line device */#define FTDI_XF_632_PID  0xFC08	/* Two line device *//* * The following are the values for the Matrix Orbital LCD displays, * which are the FT232BM ( similar to the 8U232AM ) */#define FTDI_MTXORB_VID                FTDI_VID        /* Matrix Orbital Product Id */#define FTDI_MTXORB_0_PID      0xFA00  /* Matrix Orbital Product Id */#define FTDI_MTXORB_1_PID      0xFA01  /* Matrix Orbital Product Id */#define FTDI_MTXORB_2_PID      0xFA02  /* Matrix Orbital Product Id */#define FTDI_MTXORB_3_PID      0xFA03  /* Matrix Orbital Product Id */#define FTDI_MTXORB_4_PID      0xFA04  /* Matrix Orbital Product Id */#define FTDI_MTXORB_5_PID      0xFA05  /* Matrix Orbital Product Id */#define FTDI_MTXORB_6_PID      0xFA06  /* Matrix Orbital Product Id *//* Commands */#define FTDI_SIO_RESET 		0 /* Reset the port */#define FTDI_SIO_MODEM_CTRL 	1 /* Set the modem control register */#define FTDI_SIO_SET_FLOW_CTRL	2 /* Set flow control register */#define FTDI_SIO_SET_BAUD_RATE	3 /* Set baud rate */#define FTDI_SIO_SET_DATA	4 /* Set the data characteristics of the port */#define FTDI_SIO_GET_MODEM_STATUS	5 /* Retrieve current value of modern status register */#define FTDI_SIO_SET_EVENT_CHAR	6 /* Set the event character */#define FTDI_SIO_SET_ERROR_CHAR	7 /* Set the error character *//* Port Identifier Table */#define PIT_DEFAULT 		0 /* SIOA */#define PIT_SIOA		1 /* SIOA *//* The device this driver is tested with one has only one port */#define PIT_SIOB		2 /* SIOB */#define PIT_PARALLEL		3 /* Parallel *//* FTDI_SIO_RESET */#define FTDI_SIO_RESET_REQUEST FTDI_SIO_RESET#define FTDI_SIO_RESET_REQUEST_TYPE 0x40#define FTDI_SIO_RESET_SIO 0#define FTDI_SIO_RESET_PURGE_RX 1#define FTDI_SIO_RESET_PURGE_TX 2/* * BmRequestType:  0100 0000B * bRequest:       FTDI_SIO_RESET * wValue:         Control Value  *                   0 = Reset SIO *                   1 = Purge RX buffer *                   2 = Purge TX buffer * wIndex:         Port * wLength:        0 * Data:           None * * The Reset SIO command has this effect: * *    Sets flow control set to 'none' *    Event char = $0D *    Event trigger = disabled *    Purge RX buffer *    Purge TX buffer *    Clear DTR *    Clear RTS *    baud and data format not reset * * The Purge RX and TX buffer commands affect nothing except the buffers *   *//* FTDI_SIO_SET_BAUDRATE */#define FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE 0x40#define FTDI_SIO_SET_BAUDRATE_REQUEST 3/* * BmRequestType:  0100 0000B * bRequest:       FTDI_SIO_SET_BAUDRATE * wValue:         BaudDivisor value - see below * wIndex:         Port * wLength:        0 * Data:           None * The BaudDivisor values are calculated as follows: * - BaseClock is either 12000000 or 48000000 depending on the device. FIXME: I wish *   I knew how to detect old chips to select proper base clock! * - BaudDivisor is a fixed point number encoded in a funny way. *   (--WRONG WAY OF THINKING--) *   BaudDivisor is a fixed point number encoded with following bit weighs: *   (-2)(-1)(13..0). It is a radical with a denominator of 4, so values *   end with 0.0 (00...), 0.25 (10...), 0.5 (01...), and 0.75 (11...). *   (--THE REALITY--) *   The both-bits-set has quite different meaning from 0.75 - the chip designers *   have decided it to mean 0.125 instead of 0.75. *   This info looked up in FTDI application note "FT8U232 DEVICES \ Data Rates *   and Flow Control Consideration for USB to RS232". * - BaudDivisor = (BaseClock / 16) / BaudRate, where the (=) operation should *   automagically re-encode the resulting value to take fractions into consideration. * As all values are integers, some bit twiddling is in order: *   BaudDivisor = (BaseClock / 16 / BaudRate) | *   (((BaseClock / 2 / BaudRate) & 4) ? 0x4000    // 0.5 *    : ((BaseClock / 2 / BaudRate) & 2) ? 0x8000  // 0.25 *    : ((BaseClock / 2 / BaudRate) & 1) ? 0xc000  // 0.125 *    : 0) * * For the FT232BM, a 17th divisor bit was introduced to encode the multiples * of 0.125 missing from the FT8U232AM.  Bits 16 to 14 are coded as follows * (the first four codes are the same as for the FT8U232AM, where bit 16 is * always 0): *   000 - add .000 to divisor *   001 - add .500 to divisor *   010 - add .250 to divisor *   011 - add .125 to divisor *   100 - add .375 to divisor *   101 - add .625 to divisor *   110 - add .750 to divisor *   111 - add .875 to divisor * Bits 15 to 0 of the 17-bit divisor are placed in the urb value.  Bit 16 is  * placed in bit 0 of the urb index. * * Note that there are a couple of special cases to support the highest baud * rates.  If the calculated divisor value is 1, this needs to be replaced with * 0.  Additionally for the FT232BM, if the calculated divisor value is 0x4001 * (1.5), this needs to be replaced with 0x0001 (1) (but this divisor value is * not supported by the FT8U232AM). */typedef enum {	SIO = 1,	FT8U232AM = 2,	FT232BM = 3,} ftdi_chip_type_t;typedef enum { ftdi_sio_b300 = 0,  ftdi_sio_b600 = 1,  ftdi_sio_b1200 = 2, ftdi_sio_b2400 = 3, ftdi_sio_b4800 = 4, ftdi_sio_b9600 = 5, ftdi_sio_b19200 = 6, ftdi_sio_b38400 = 7, ftdi_sio_b57600 = 8, ftdi_sio_b115200 = 9} FTDI_SIO_baudrate_t ;/* * The ftdi_8U232AM_xxMHz_byyy constants have been removed. The encoded divisor values * are calculated internally. */#define FTDI_SIO_SET_DATA_REQUEST FTDI_SIO_SET_DATA#define FTDI_SIO_SET_DATA_REQUEST_TYPE 0x40#define FTDI_SIO_SET_DATA_PARITY_NONE (0x0 << 8 )#define FTDI_SIO_SET_DATA_PARITY_ODD (0x1 << 8 )#define FTDI_SIO_SET_DATA_PARITY_EVEN (0x2 << 8 )#define FTDI_SIO_SET_DATA_PARITY_MARK (0x3 << 8 )#define FTDI_SIO_SET_DATA_PARITY_SPACE (0x4 << 8 )#define FTDI_SIO_SET_DATA_STOP_BITS_1 (0x0 << 11 )#define FTDI_SIO_SET_DATA_STOP_BITS_15 (0x1 << 11 )#define FTDI_SIO_SET_DATA_STOP_BITS_2 (0x2 << 11 )#define FTDI_SIO_SET_BREAK (0x1 << 14)/* FTDI_SIO_SET_DATA *//* * BmRequestType:  0100 0000B  * bRequest:       FTDI_SIO_SET_DATA * wValue:         Data characteristics (see below) * wIndex:         Port * wLength:        0 * Data:           No * * Data characteristics * *   B0..7   Number of data bits *   B8..10  Parity *           0 = None *           1 = Odd *           2 = Even *           3 = Mark *           4 = Space *   B11..13 Stop Bits *           0 = 1 *           1 = 1.5 *           2 = 2 *   B14 *           1 = TX ON (break) *           0 = TX OFF (normal state) *   B15 Reserved * *//* FTDI_SIO_MODEM_CTRL */#define FTDI_SIO_SET_MODEM_CTRL_REQUEST_TYPE 0x40#define FTDI_SIO_SET_MODEM_CTRL_REQUEST FTDI_SIO_MODEM_CTRL/*  * BmRequestType:   0100 0000B * bRequest:        FTDI_SIO_MODEM_CTRL * wValue:          ControlValue (see below) * wIndex:          Port * wLength:         0 * Data:            None * * NOTE: If the device is in RTS/CTS flow control, the RTS set by this * command will be IGNORED without an error being returned * Also - you can not set DTR and RTS with one control message */#define FTDI_SIO_SET_DTR_MASK 0x1#define FTDI_SIO_SET_DTR_HIGH ( 1 | ( FTDI_SIO_SET_DTR_MASK  << 8))#define FTDI_SIO_SET_DTR_LOW  ( 0 | ( FTDI_SIO_SET_DTR_MASK  << 8))#define FTDI_SIO_SET_RTS_MASK 0x2#define FTDI_SIO_SET_RTS_HIGH ( 2 | ( FTDI_SIO_SET_RTS_MASK << 8 ))#define FTDI_SIO_SET_RTS_LOW ( 0 | ( FTDI_SIO_SET_RTS_MASK << 8 ))/* * ControlValue * B0    DTR state *          0 = reset *          1 = set * B1    RTS state *          0 = reset *          1 = set * B2..7 Reserved * B8    DTR state enable *          0 = ignore