/* sysALib.s - SAMSUNG S3C2510 system-dependent routines */

/* Copyright 2002 SAMSUNG ELECTRONICS */

/*
modification history
--------------------
01a,08feb02,jmLee   created.
*/

/*
DESCRIPTION
This module contains system-dependent routines written in assembly language. It
contains the entry code, sysInit(), for VxWorks images that start running from
RAM, such as 'vxWorks'. These images are loaded into memory by some external
program (e.g., a boot ROM) and then started. The routine sysInit() must come
first in the text segment. Its job is to perform the minimal setup needed to
call the generic C routine usrInit().

sysInit() masks interrupts in the processor and the interrupt controller and
sets the initial stack pointer. Other hardware and device initialization is
performed later in the sysHwInit routine in sysLib.c.

NOTE
The routines in this module don't use the "C" frame pointer %r11@ ! or establish
a stack frame.

SEE ALSO:
.I "ARM Architecture Reference Manual,"
.I "ARM 940T Technical Reference Manual",
.I "ARM Reference Peripherals Specification,"
.I "SAMSUNG S3C2510 Microcontroller User's Manual",
*/


#define _ASMLANGUAGE
#include "vxWorks.h"
#include "asm.h"
#include "config.h"
#include "regs.h"
#include "sysLib.h"
#include "arch/arm/mmuArmLib.h"
#include "drv/multi/s3c2510.h"

        /* internals */

        .globl  _sysInit                                    /* start of system code */
        .globl  _sysIntStackSplit                           /* routine to split interrupt stack */
        .globl  _sysMpuGlobalMapInit                        /* routine to split interrupt stack */
        

        /* externals */

        .extern _usrInit                                    /* system initialization routine */

        .extern _vxSvcIntStackBase                          /* base of SVC-mode interrupt stack */
        .extern _vxSvcIntStackEnd                           /* end of SVC-mode interrupt stack */
        .extern _vxIrqIntStackBase                          /* base of IRQ-mode interrupt stack */
        .extern _vxIrqIntStackEnd                           /* end of IRQ-mode interrupt stack */

        .data
        .ascii  "87:65:43:21:"
        .balign	4

        .text
        .balign 4

/*******************************************************************************
*
* sysInit - start after boot
*
* This routine is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting.  It disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit().  This
* stack is used only by usrInit() and is never used again.  Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A

* sysInit ()              /@ THIS IS NOT A CALLABLE ROUTINE @/

*/

_ARM_FUNCTION(_sysInit)

        /*
         * Set processor and MMU to known state as follows (we may have not
         * been entered from a reset). We must do this before setting the CPU
         * mode.
         *
         * MMU Control Register layout.
         *
         * bit
         *  0 P 0 Protection Unit Enable
         *  1 Z 0 Reserved (Should Be Zero)
         *  2 D 0 Data Cache Enable
         *  3 O 1 Reserved (Should Be One)
         *  4 O 1 Reserved (Should Be One)
         *  5 O 1 Reserved (Should Be One)
         *  6 O 1 Reserved (Should Be One)
         *  7 E 0 Endianness (0:Little, 1:Big)
         *  8 Z 0 Reserved (Should Be Zero)
         *  9 Z 0 Reserved (Should Be Zero)
         * 10 Z 0 Reserved (Should Be Zero)
         * 11 Z 0 Reserved (Should Be Zero)
         * 12 I 0 Instruction Cache Enable
         * 13 V 0 Alternate Vectors Select
         * 14 Z 0 Reserved (Should Be Zero)
         * .
         * .
         * 29 Z 0 Reserved (Should Be Zero)
         * 30 F 0 Fastbus Clocking Select
         * 31 A 0 Asynchoronous Clocking Select
         */

        /* Initialize MMU Control Register. */
        LDR     r1, =MMU_INIT_VALUE                         /* defined in mmuArmLib.h */
        ORR     r1, r1, #CLOCK_MODE                         /* defined in config.h */
        MCR     CP_MMU, 0, r1, c1, c0, 0                    /* write to MMU CR */

        /* Drain write-buffer. */
        LDR     r1, L$_sysCacheUncachedAdrs                 /* R1 -> uncached area */
        LDR     r1, [r1]                                    /* drain write-buffer */

        /* Flush (invalidate) both caches. */
        MOV     r1, #0                                      /* data SBZ */
        MCR     CP_MMU, 0, r1, c7, c5, 0                    /* Flush (invalidate) all I-cache */
        MCR     CP_MMU, 0, r1, c7, c6, 0                    /* Flush (invalidate) all D-cache */

        /* Disable interrupts in CPU and switch to SVC32 mode. */
        MRS     r1, cpsr
        BIC     r1, r1, #MASK_MODE                          /* defined in arm.h */
        ORR     r1, r1, #MODE_SVC32 | I_BIT | F_BIT
        MSR     cpsr, r1

        /* Disable individual interrupts in the interrupt controller. */
        LDR     r2, =S3C2510_INTINTMASK
        LDR     r1, =S3C2510_INT_MASK_INTERNAL
        STR     r1, [r2]                                    /* disable all internal interrupt */
        LDR     r2, =S3C2510_EXTINTMASK
        LDR     r1, =S3C2510_INT_MASK_EXTERNAL
        STR     r1, [r2]                                    /* disable all external interrupt */

        /* Disable peripherals. */
        
        LDR     r2, =S3C2510_PCLKDIS
        LDR     r1, =S3C2510_PCLKDIS_SAR | \
                     S3C2510_PCLKDIS_PCI_PCCARD  | \
                     S3C2510_PCLKDIS_USBH | \
                     S3C2510_PCLKDIS_DES | \
                     S3C2510_PCLKDIS_I2C | \
                     S3C2510_PCLKDIS_IOP | \
                     S3C2510_PCLKDIS_WDT | \
                     S3C2510_PCLKDIS_TIMER5 | \
                     S3C2510_PCLKDIS_TIMER4 | \
                     S3C2510_PCLKDIS_TIMER3 | \
                     S3C2510_PCLKDIS_TIMER2 | \
                     S3C2510_PCLKDIS_TIMER1 | \
                     S3C2510_PCLKDIS_TIMER0 | \
                     S3C2510_PCLKDIS_HUART1 | \
                     S3C2510_PCLKDIS_HUART0 | \
                     S3C2510_PCLKDIS_CUART | \
                     S3C2510_PCLKDIS_USB | \
                     S3C2510_PCLKDIS_ETH1 | \
                     S3C2510_PCLKDIS_ETH0 | \
                     S3C2510_PCLKDIS_GDMA5 | \
                     S3C2510_PCLKDIS_GDMA4 | \
                     S3C2510_PCLKDIS_GDMA3 | \
                     S3C2510_PCLKDIS_GDMA2 | \
                     S3C2510_PCLKDIS_GDMA1 | \
                     S3C2510_PCLKDIS_GDMA0
        STR     r1, [r2]
		

        /*
         * Initialize PLL Control Register.
         *
         * Output Clock = Input Clock * (M + 8) / (P + 2) * (2 ^ S)
         */

/* temp jwchoi 
		LDR     r2, =S3C2510_CPLLCON
        LDR     r1, =0x00010300 | (CPLL_FREQ - 8)           
        STR     r1, [r2]
        
        LDR     r1, =0x100 // CPLL_FREQ*100 //
delay1:
        SUBS    r1, r1, #1
        BNE     delay1

        LDR     r2, =S3C2510_SPLLCON
        LDR     r1, =0x00010300 | (SPLL_FREQ - 8)           
        STR     r1, [r2]
temp jwchoi */

#ifndef UCLK_EXTERNAL
        LDR     r2, =S3C2510_UPLLCON
        LDR     r1, =0x00010300 | (UPLL_FREQ - 8)           /* defined in config.h */
        STR     r1, [r2]
#endif  /* UCLK_EXTERNAL */

#ifndef PCLK_EXTERNAL
        LDR     r2, =S3C2510_PPLLCON
        LDR     r1, =0x00010300 | (PPLL_FREQ - 8)           /* defined in config.h */
        STR     r1, [r2]
#endif  /* PCLK_EXTERNAL */

        /* Enable PLL Register and Remap. */
        LDR     r2, =S3C2510_SYSCFG
        LDR     r1, =S3C2510_SYSCFG_REMAP | \
                     S3C2510_SYSCFG_ARBR   
                     
                     /* S3C2510_SYSCFG_CPLLREN | \  
                        S3C2510_SYSCFG_SPLLREN | \*/        
                     
                     
#ifndef UCLK_EXTERNAL
        ORR     r1, r1, #S3C2510_SYSCFG_UPLLREN 
#endif  /* UCLK_EXTERNAL */
#ifndef PCLK_EXTERNAL
        ORR     r1, r1, #S3C2510_SYSCFG_PPLLREN
#endif  /* PCLK_EXTERNAL */

        STR     r1, [r2]

        /* Initialize AHB Bus Master Fixed Priority Register. */
        LDR     r2, =S3C2510_HPRIF
        LDR     r1, =0x76543210
        STR     r1, [r2]

        /* Set initial stack pointer so stack grows down from start of code. */
        ADR     sp, _sysInit                                /* initialize stack pointer */
        MOV     fp, #0                                      /* initialize frame pointer */