//-----------------------------------------------------------------------------
//   File:      atapi.h
//   Contents:   Header file
//
// Copyright (c) 1999 Cypress Semiconductor, Inc. All rights reserved
//
// $Archive: /USB/atapifx2/CY4611B/atapi.h $
// $Date: 6/26/05 1:57p $
// $Revision: 8 $
//-----------------------------------------------------------------------------
#ifndef ATAPI_H
#define ATAPI_H
// struct for storing mx2 config data
typedef struct
{
   WORD   Signature;          // 0-1
   BYTE   ApmValue;           // 2
   BYTE   AtaInitTimeout;     // 3
   BYTE   AtaCommand;         // 4
   BYTE   MiscConfig;         // 5    
      //sbit bATA_UDMA_ENABLE             = miscConfig^7;      (copied)
      //sbit bATAPI_UDMA_ENABLE           = miscConfig^6;      (copied)
      //sbit bENABLE_WRITE_CACHE_MODE_PAGE= miscConfig^5;
      //sbit bCOMPLIANCE_MODE             = miscConfig^4;                // Compliance mode uses the INTRQ pin less, but it will pass the BOT tests.

      //sbit bWAIT_FOR_BUSY_BIT           = miscConfig^3;
      //sbit bSHORT_PACKET_BEFORE_STALL   = miscConfig^2;
      //sbit bSRST_ENABLE                 = miscConfig^1;
      //sbit bSKIP_PIN_RESET              = miscConfig^0;
   BYTE   UdmaConfig;         // 6
   BYTE   PioConfig;          // 7
   BYTE   PinConfig;          // 8 Controls 100 pin package
      //sbit bBUTTON_PINOUT               = pinConfig ^ 7;
      //sbit bATA_ENABLED                 = pinConfig ^ 6;
      //sbit bBIG_PACKAGE                 = pinConfig ^ 5;
      //sbit bATA_EN                      = pinConfig ^ 4;
      //sbit bNewAt2pinout                = pinConfig ^ 3;
      //sbit bHS_INDICATOR                = pinConfig ^ 2;
      //sbit bDRVPWRVLD_POLARITY          = pinConfig ^ 1;
      //sbit bDRVPWRVLD_ENABLE            = pinConfig ^ 0;     (CF = 1)
   BYTE   GpioOE;             // 9
   BYTE   GpioData;           // A
   BYTE   Lun0String;         // B
   BYTE   Lun1String;         // C
   BYTE   delayAfterReset;    // D
   BYTE   MiscConfig2;        // E
      //sbit bCF_USES_UDMA                = MiscConfig2 ^ 3;
      //sbit b2LUN_SET_BY_EEPROM          = MiscConfig2 ^ 2;
      //sbit b1LUN_SET_BY_EEPROM          = MiscConfig2 ^ 1;
      //sbit bSEARCH_ATA_ON_WAKEUP        = MiscConfig2 ^ 0;
   BYTE   pad3;               // F
} MX2_CONFIG_DATA;


// bit defines for mx2 config data
//#define ATA_UDMA_ENABLE             0x80
//#define ATAPI_UDMA_ENABLE           0x40

//#define WAIT_FOR_BUSY_BIT           0x08
//#define SHORT_PACKET_BEFORE_STALL   0x04
//#define SRST_ENABLE                 0x02
//#define SKIP_PIN_RESET              0x01

///////////////////////////////////////////////////////////////////////////////
// Configuration Settings -- Additional settings beyond the command line
// parameters in the build options.  The build option string is limited to 255
// characters, so many flags are here.
///////////////////////////////////////////////////////////////////////////////

// DEVICE_TYPE_IS_SCSI
// DEVICE_TYPE_IS_IDE -- Enable SCSI commands or IDE commands.  SCSI commands
// are used by ATAPI devices.  IDE devices are typically hard drives.  Both
// of these flags may be active at once to support both types of devices.  If
// one of these flags is disabled, it saves a significant amount of code space.
// All of the base code images support IDE.  The CF only base image does NOT 
// support SCSI, so that option is on the command line.
#define DEVICE_TYPE_IS_IDE TRUE

// APM_VALUE - ATA Device Automatic Power Management Value. If an attached ATA
// device supports APM and this field contains other than 0x00, the Initialization
// state machines will issue a SET FEATURES command to Enable APM with the register
// value during the drive initialization process. Setting APM Value to 0x00 disables
// this functionality. This register value is ignored with ATAPI devices. 
#define APM_VALUE                   (mx2_config_data.ApmValue)

// ATA_INIT_TIMEOUT - Time in 128 millisecond granularity before the firmware
// stops polling the ALT STAT register for reset complete and restarts the reset
// process (0x80 = 16.4 seconds).
#define ATA_INIT_TIMEOUT            (mx2_config_data.AtaInitTimeout)

// ATA_UDMA_ENABLE - Enable Ultra Mode data transfer support for ATA devices. If
// enabled, AND the ATA device reports UDMA support, the firmware will utilize
// UDMAdata transfers.
#define ATA_UDMA_ENABLE             bATA_UDMA_ENABLE

// ATAPI_UDMA_ENABLE - Enable Ultra Mode data transfer support for ATAPI devices.
// If enabled,AND the ATAPI device reports UDMA support, the CY7C68200 will
// utilizeUDMA data transfers.
#define ATAPI_UDMA_ENABLE           bATAPI_UDMA_ENABLE

// WAIT_FOR_BUSY_BIT - If set to TRUE, enables a delay of up to 120ms at each
// read of the DRQ bit where the device data length does not match the host data
// length. This allows the firmware to work with most devices that incorrectly
// clear the BUSY bit before a valid status is present.
#define WAIT_FOR_BUSY_BIT           bWAIT_FOR_BUSY_BIT

// ATAPI_WAIT_FOR_SERV_BIT -- Wait for the SERV bit to become TRUE before trying the next
// ATAPI command.  This switch forces the code to wait for both BSY = 0 and SERV = 1 before
// allowing an ATAPI command.  Some drives require this (Mitsumi SR244W1).  SERV=1 is not
// defined by the ATAPI spec and may produce unpredictable results.  Recommended
// setting = FALSE.
#define ATAPI_WAIT_FOR_SERV_BIT     FALSE

// SHORT_PACKET_BEFORE_STALL - Determines if a short packet is sent prior to
// the STALL ofan IN endpoint. The USB Mass Storage Class Bulk-Only
// Specification allows a device to send a short or zero-length IN packet
// prior to returning a STALL handshake for certain cases. Certain host
// controller drivers may require a short packet prior to STALL.
#define SHORT_PACKET_BEFORE_STALL   bSHORT_PACKET_BEFORE_STALL

// SRST_ENABLE - If srt to TRUE, firmware will perform a SRST reset during
// drive initialization. Note: At least one reset must be en-abled.
// Do not set SRST to FALSE and Skip Pin Reset to TRUE at the
// same time.
#define SRST_ENABLE                 bSRST_ENABLE

// SKIP_PIN_RESET - Skip ATA_NRESET assertion. Note: SRST Enable must be
// set in conjunction with Skip Pin Reset. Setting this bit causes the
// firmware to bypass ARESET# during initialization.  All reset events except
// a power-on reset utilize SRST as the drive mechanism.
//
// FALSE = Allow ARESET# assertion for all resets.
// TRUE  = Disable ARESET# assertion except for power-on reset cycles.
#define SKIP_PIN_RESET              bSKIP_PIN_RESET

// UDMA_MODES - These bits select which UDMA modes, if supported, are
// enabled. Setting to 1 enables. Multiple bits may be set. The
// firmware will operate in the highest enabled UDMA mode supported by
// the device. 
//
// Recommended Setting: 0x14 (UDMA mode2 and mode4 only)
#define UDMA_MODES                  (mx2_config_data.UdmaConfig)    /* 0x14 */
#define DMA_MODES                   (mx2_config_data.PioConfig & 4)
// PIO_MODES - These bits select which PIO modes, if supported, are
// en-abled.  Setting to 1 enables. Multiple bits may be set. The
// firmware will operate in the highest enabled PIO mode supported by
// the device. The firmware supports PIO modes 0, 3, and 4 only. PIO
// mode 0 is always enabled.
// Bit Descriptions
// 1 Enable PIO mode 4.
// 0 Enable PIO mode 3.
#define PIO_MODES                   (mx2_config_data.PioConfig & 3)

// ATA_ENABLED
// If this bit is set, the ATA bus will be checked for one or two active ATA devices
// on startup.  If no device is found, we will never attach to the bus.
#define ATA_ENABLED                 (bATA_ENABLED)

// USE_ATA_DEVICE_SERIAL_NUMBER - For ATA devices, determines if the firmware
// uses the serial number reported by the device as the USB serial number.
// If TRUE, firmware uses the serial number reported by the device in
// response to IDENTIFY_DEVICE command.  If FALSE, the firmware sets
// the USB serial number index to 0 (i.e. no serial number string is
// reported in the device descriptor).
//
// Recommended Setting: FALSE
#define USE_ATA_DEVICE_SERIAL_NUMBER      FALSE

// USE_ATAPI_DEVICE_SERIAL_NUMBER - For ATAPI devices, determines
// if the firmware uses the serial number reported by the device as
// the USB serial number. If TRUE, firmware uses the serial number
// reported by the device in response to IDENTIFY_DEVICE command. 
// If FALSE, the firmware sets the USB serial number index to 0
// (i.e. no serial number string is reported in the device descriptor).
// Many ATAPI devices do not report a unique serial number.  It is 
// better to report no serial number than to report a non-unique
// serial number.
//
// Recommended Setting: FALSE 
#define USE_ATAPI_DEVICE_SERIAL_NUMBER    FALSE

// NIBBLE_CONVERT_SERIAL_NUMBER - Determines if the firmware converts
// each nibble of the serial number reported by the device into a
// single character of the USB serial number.  The Bulk-only mass
// storage class spec only allows HEX characters (0-9 and A-F) in the
// device serial number.  Some devices report other ASCII characters.
// Converting each nibble into HEX assures spec compliance while
// maintaining the uniqueness of the serial number.
//
// Recommended Setting: FALSE
#define NIBBLE_CONVERT_SERIAL_NUMBER      FALSE

//////////////////////////////////////////////////
// STANDBY_IMMEDIATE -- Enables special purpose power-saving code.
//
// Expected conditions:  
//     Self-powered, no bus-sharing, single IDE device
//
// This code will issue a standby_immediate command to the currently selected
// drive when a USB suspend condition is detected.
//
// This flag is set by the command line.
// #define STANDBY_IMMEDIATE TRUE

// DELAY_AFTER_RESET is the time (in milliseconds) that the firmware
// will pause after a ATA bus reset (soft or pin reset).  Certain devices
// (in particular ATAPI devices in multi-LUN configurations) cannot be
// detected if they are accessed right after an ATA reset.  This pause
// gives them time to recover from reset.
#define DELAY_AFTER_POWERUP 2000    /* This delay is recommended to allow for power stability before startup */
#define DELAY_AFTER_RESET 1000      /*  */

// ATACB_ENABLE turns on support for the ATACB passthrough commands
#define ATACB_ENABLE TRUE

// struct for holding device info
typedef struct
{
   BYTE NumCylindersMSB; // #Cyl MSB
   BYTE NumCylindersLSB; // #Cyl LSB
   BYTE NumHeads;        // #Heads
   BYTE NumSectPerTrack; // #SectorsPerTrack
   BYTE MaxPIO;
   BYTE udmaMode;      // global to keep track of which udma mode we are in
   BYTE commandSetSupport;
   DWORD driveCapacity;
} DEVICE_CONFIG_DATA;

//#define WAIT_FOR_BUSY_BIT           0x08
//#define SHORT_PACKET_BEFORE_STALL   0x04
//#define SRST_ENABLE                 0x02
//#define SKIP_PIN_RESET              0x01

///////////////////////////////////////////////////////////////////////////////
// Interface specific function definitions
///////////////////////////////////////////////////////////////////////////////
void hardwareReset();
void writePIO8(char addr, BYTE indata);
void fastWritePIO8(char addr, BYTE indata);
void writePIO16(WORD count);
void readPIO16(WORD count);
BYTE readPIO8(char addr);
BYTE readATAPI_STATUS_REG(void);
BYTE readATAPI_ALT_STATUS_REG(void);
WORD readWordPIO8(char addr);
void initUdmaRead();
void initUdmaWrite();
void slowDownOnUDMAErrors();
void prepUDMA(BYTE b2, BYTE b1, BYTE b0);
void readUDMA();
void writeUDMA();
void abortGPIF();
void initUSB(void);
void LoadandVerifyWaveForm(BYTE *WaveForm);
WORD getDriveDataLen();
void ResetAndArmEp2();
void configureATATransferMode(BYTE mode);
bit EEPROMWriteBlock(WORD addr, BYTE xdata * ptr, BYTE len);
bit EEPROMWrite(WORD len, WORD addr);
bit EEWaitForDone();
void waitForInBuffer();
void detectSCSIvsATA();
void mymemmove(BYTE data * dest, BYTE data * src, BYTE len);
void SendDeviceIdentifyCommand(bit waitForINTRQ);
void FetchDeviceIdentifyIntoEp6();
BYTE checkCBW();
void sendDescriptor(BYTE offset);
BYTE processATACB();
void loadEP6BC(WORD dataLen);
void EP6Manual();
void EP2Manual();
bit ATACBcheckStatus();
void enterMfgMode();
void setDefaultConfig();
void driveATABus();
void triStateATABus();
BYTE flushCache();
void standbyImmediate();
void initDriveAfterReset();

#define FAIL_IN_ON_TIMEOUT 1
#define DONT_FAIL_IN_ON_TIMEOUT 0

///////////////////////////////////////////////////////////////////////////////
// Common function definitions
///////////////////////////////////////////////////////////////////////////////

//------------ ide ------------------------------
void softReset();
void TD_Poll(void);
void SetupCommand(void);
void stallEP2OUT();
BYTE SCSITestUnitReady();
void resetATADevice();
void resetATAPIDevice();
void processCBWHeader();
void processCBW();
BYTE processConfigCBCommand();
void SCSIInquiryToATAPI();
void sendUSBS(BYTE passOrFail);
void sendRAMData(BYTE xdata *inData, WORD dataTransferLen);
BYTE generalSCSIInCommand();
BYTE generalSCSIOutCommand();
BYTE generalIDEInCommand();
BYTE generalIDEOutCommand();
BYTE ideReadCommand(BYTE command);
BYTE ideWriteCommand(BYTE command);
bit ideUdmaWriteCommand();
bit sendSCSICommand();
void failedIn();
void ATAPIIdDevice();
bit waitForBusyBit();
BYTE scsiReadPio();
void prepareForIDECommand();
void mymemmovexx(BYTE xdata * dest, BYTE xdata * src, WORD len);
void mymemmovexxISR(BYTE xdata * dest, BYTE xdata * src, WORD len);
void writeATA_DRIVESEL_REG();
void checkATAEnable();
void sendprev();
void fastSCSIStart();
#if DEVICE_TYPE_IS_IDE
   bit checkForMedia(bit commandProcessing);
#else
   #define checkForMedia(x)
#endif
void prepSCSICommand();
void mymemmoveix(BYTE idata * dest, BYTE xdata * src, BYTE len);  //mdnspd
void fastReadStart();  
bit fastReadComplete();  
void fastWriteStart();  
bit fastWriteComplete();  
unsigned char mymemcmpa(unsigned char idata * s1, unsigned char xdata * s2, unsigned char len);
void prepForSCSICommand();
bit EEPROMRead(WORD addr, WORD length, BYTE xdata *buf);
void ATAInit();
BYTE scsiWrite(void);
BYTE scsiWriteUdma();
void prepareForATAPICommand();
BYTE scsiReadUdma();
BYTE waitForDRQBit(bit expectedValue);
bit setFeatures(BYTE command, BYTE subcommand);
void fastSCSIStart();
void preloadSCSIRegs();
void checkGPIOonPA3();

#define IGNORE_DRIVE_LEN 1
#define LISTEN_TO_DRIVE_LEN 0
#define BUFFER_SIZE 0xf0

extern void serialNumber();
extern code char IntrfcSubClassHighSpeed;
extern code char IntrfcSubClassFullSpeed;
extern DWORD dataTransferLen;
extern WORD wPacketSize;
extern bit phaseErrorState;

extern BYTE DeviceDscrOffset;
extern BYTE DeviceQualDscrOffset;
extern BYTE FullSpeedConfigDscrOffset;