SECTION: ".abs_section_18"
  _SCDR 
SECTION: ".abs_section_a"
  _SCIACTL 
SECTION: ".abs_section_b"
  _SCIADAT 
SECTION: ".abs_section_9"
  _SCPSC 
SECTION: ".abs_section_16"
  _SCS1 
SECTION: ".abs_section_17"
  _SCS2 
SECTION: ".abs_section_10"
  _SPCR 
SECTION: ".abs_section_12"
  _SPDR 
SECTION: ".abs_section_11"
  _SPSCR 
SECTION: ".abs_section_fe01"
  _SRSR 
SECTION: ".abs_section_21"
  _T1CNT _T1CNTH 
SECTION: ".abs_section_22"
  _T1CNTL 
SECTION: ".abs_section_26"
  _T1CH0 _T1CH0H 
SECTION: ".abs_section_27"
  _T1CH0L 
SECTION: ".abs_section_29"
  _T1CH1 _T1CH1H 
SECTION: ".abs_section_2a"
  _T1CH1L 
SECTION: ".abs_section_23"
  _T1MOD _T1MODH 
SECTION: ".abs_section_24"
  _T1MODL 
SECTION: ".abs_section_20"
  _T1SC 
SECTION: ".abs_section_25"
  _T1SC0 
SECTION: ".abs_section_28"
  _T1SC1 
SECTION: ".abs_section_2c"
  _T2CNT _T2CNTH 
SECTION: ".abs_section_2d"
  _T2CNTL 
SECTION: ".abs_section_31"
  _T2CH0 _T2CH0H 
SECTION: ".abs_section_32"
  _T2CH0L 
SECTION: ".abs_section_34"
  _T2CH1 _T2CH1H 
SECTION: ".abs_section_35"
  _T2CH1L 
SECTION: ".abs_section_2e"
  _T2MOD _T2MODH 
SECTION: ".abs_section_2f"
  _T2MODL 
SECTION: ".abs_section_2b"
  _T2SC 
SECTION: ".abs_section_30"
  _T2SC0 
SECTION: ".abs_section_33"
  _T2SC1 
SECTION: ".abs_section_1c"
  _TBCR 
SECTION: ".abs_section_540"
  _RBIDR0 
SECTION: ".abs_section_541"
  _RBIDR1 
SECTION: ".abs_section_542"
  _RBIDR2 
SECTION: ".abs_section_543"
  _RBIDR3 
SECTION: ".abs_section_544"
  _RBDSR0 
SECTION: ".abs_section_545"
  _RBDSR1 
SECTION: ".abs_section_546"
  _RBDSR2 
SECTION: ".abs_section_547"
  _RBDSR3 
SECTION: ".abs_section_548"
  _RBDSR4 
SECTION: ".abs_section_549"
  _RBDSR5 
SECTION: ".abs_section_54a"
  _RBDSR6 
SECTION: ".abs_section_54b"
  _RBDSR7 
SECTION: ".abs_section_54c"
  _RBDLR 
SECTION: ".abs_section_550"
  _TB0IDR0 
SECTION: ".abs_section_551"
  _TB0IDR1 
SECTION: ".abs_section_552"
  _TB0IDR2 
SECTION: ".abs_section_553"
  _TB0IDR3 
SECTION: ".abs_section_554"
  _TB0DSR0 
SECTION: ".abs_section_555"
  _TB0DSR1 
SECTION: ".abs_section_556"
  _TB0DSR2 
SECTION: ".abs_section_557"
  _TB0DSR3 
SECTION: ".abs_section_558"
  _TB0DSR4 
SECTION: ".abs_section_559"
  _TB0DSR5 
SECTION: ".abs_section_55a"
  _TB0DSR6 
SECTION: ".abs_section_55b"
  _TB0DSR7 
SECTION: ".abs_section_55c"
  _TB0DLR 
SECTION: ".abs_section_55d"
  _TB0TBPR 
SECTION: ".abs_section_560"
  _TB1IDR0 
SECTION: ".abs_section_561"
  _TB1IDR1 
SECTION: ".abs_section_562"
  _TB1IDR2 
SECTION: ".abs_section_563"
  _TB1IDR3 
SECTION: ".abs_section_564"
  _TB1DSR0 
SECTION: ".abs_section_565"
  _TB1DSR1 
SECTION: ".abs_section_566"
  _TB1DSR2 
SECTION: ".abs_section_567"
  _TB1DSR3 
SECTION: ".abs_section_568"
  _TB1DSR4 
SECTION: ".abs_section_569"
  _TB1DSR5 
SECTION: ".abs_section_56a"
  _TB1DSR6 
SECTION: ".abs_section_56b"
  _TB1DSR7 
SECTION: ".abs_section_56c"
  _TB1DLR 
SECTION: ".abs_section_56d"
  _TB1TBPR 
SECTION: ".abs_section_570"
  _TB2IDR0 
SECTION: ".abs_section_571"
  _TB2IDR1 
SECTION: ".abs_section_572"
  _TB2IDR2 
SECTION: ".abs_section_573"
  _TB2IDR3 
SECTION: ".abs_section_574"
  _TB2DSR0 
SECTION: ".abs_section_575"
  _TB2DSR1 
SECTION: ".abs_section_576"
  _TB2DSR2 
SECTION: ".abs_section_577"
  _TB2DSR3 
SECTION: ".abs_section_578"
  _TB2DSR4 
SECTION: ".abs_section_579"
  _TB2DSR5 
SECTION: ".abs_section_57a"
  _TB2DSR6 
SECTION: ".abs_section_57b"
  _TB2DSR7 
SECTION: ".abs_section_57c"
  _TB2DLR 
SECTION: ".abs_section_57d"
  _TB2TBPR 

*********************************************************************************************
UNUSED-OBJECTS SECTION
---------------------------------------------------------------------------------------------
NOT USED PROCEDURES
main.c.o:
  Delays 
RTSHC08.C.o (ansii.lib):
  _PUSH_ARGS_L _PUSH_ARGS_D _ENTER_UNARY_L _ENTER_UNARY_L64 _ENTER_UNARY_L64_4 
  _ENTER_BINARY_L _ENTER_BINARY_L_RC _ENTER_BINARY_L_LC _ENTER_BINARY_L64 
  _ENTER_BINARY_L64_LC _ENTER_BINARY_L64_RC _SPLITSIGN _LADD_k_is_k_plus_j 
  _k_is_k_plus_j_l _k_is_k_plus_j_i _LSUB_k_is_k_minus_j _LAND_k_is_k_and_j 
  _LOR_k_is_k_or_j _LXOR_k_is_k_xor_j _LMUL_k_is_k_mul_j _LDIVMOD _NEG_L_HX 
  _ABS_L_HX _SPLITSIGN_L _LMODU_k_is_k_mod_j _LDIVU_k_is_k_div_j 
  _LMODS_k_is_k_mod_j _LDIVS_k_is_k_div_j _LCMP_k_rel_j _BMULS _BDIVS _BMODS 
  _IDIVS _IMODS _IMODU _IDIVU_8 _IMODU_8 _IASR _ILSR _ILSL _ICMP _LINC _LDEC 
  _LNEG _LNOT _LADD _LADD_RC _LSUB _LSUB_LC _LSUB_RC _LAND _LAND_RC _LOR 
  _LOR_RC _LXOR _LXOR_RC _LMUL _LMUL_RC _LDIVS _LDIVS_LC _LDIVS_RC _LDIVU 
  _LDIVU_LC _LDIVU_RC _LMODS _LMODS_LC _LMODS_RC _LMODU _LMODU_LC _LMODU_RC 
  _LASR _LLSR _LLSL _LCMP _LCMP_RC _COPY _COPY_L _POP32 _POP64 _STORE32 
  _STORE64 _SEXT8_32 _SEXT16_32 _CALL _Jump_Table_Addr _Jump_Table_Offset 
  _Jump_Table_Header_Addr _Jump_Table_Header_Offset _Search_Table_16_Addr 
  _Search_Table_16_Offset _Search_Table_8_Addr _Search_Table_8_Offset _PUSH_CC 
  _POP_CC 
NOT USED VARIABLES
main.c.o:
  buf 
RTSHC08.C.o (ansii.lib):
  _PowOfTwo_8 _PowOfTwo_16 _PowOfTwo_32 errno 

*********************************************************************************************
COPYDOWN SECTION
---------------------------------------------------------------------------------------------
------- ROM-ADDRESS: 0xC382 ---- SIZE       2 ---
Filling bytes inserted
 0000

*********************************************************************************************
OBJECT-DEPENDENCIES SECTION
---------------------------------------------------------------------------------------------
Init                      USES _startupData loadByte 
_Startup                  USES _startupData __SEG_END_SSTACK Init 
AD_Filter                 USES _ADSCR _ADR _IDIVU 
Transmit                  USES _SCDR _SCS1 
initial                   USES _CONFIG2 _CONFIG1 _PCTL _SCBR _SCC1 _SCC2 _SCS1 
                                _ADCLK _PTDPUE _DDRC _PTCPUE _T2SC _T2SC1 _T2SC0 
                                _DDRD _PTD _DDRE _PTE _DDRA _PTA _T2MOD _T2CH0 
                                MyFlag 
main                      USES initial New_T1CH0 Old_T1CH0 AD_Filter _IMUL 
                                _IDIVU STRING.buf.1 Transmit MyFlag 
T2CH0OutCompare_ISR       USES MyFlag New_T1CH0 _T2CH0 Old_T1CH0 _T2SC0 
T2Overflow_ISR            USES MyFlag New_T1CH0 _T2CH0 Old_T1CH0 _T2SC 
_IDIVU                    USES _IDIVMOD 

*********************************************************************************************
DEPENDENCY TREE
*********************************************************************************************
 main and _Startup Group
 | 
 +- main                
 |  | 
 |  +- initial             
 |  |    
 |  +- AD_Filter           
 |  |  | 
 |  |  +- _IDIVU              
 |  |     | 
 |  |     +- _IDIVMOD            
 |  |          
 |  +- _IMUL               
 |  |    
 |  +- _IDIVU               (see above)
 |  |  
 |  +- Transmit            
 |       
 +- _Startup            
    | 
    +- Init                
       | 
       +- loadByte            
            
 T2Overflow_ISR      
   
 T2CH0OutCompare_ISR 
   
*********************************************************************************************
STATISTIC SECTION
---------------------------------------------------------------------------------------------

ExeFile:
--------
Number of blocks to be downloaded: 7
Total size of all blocks to be downloaded: 906