interrupt void refresh_video_DMA()
{
// Setup the transfer count register.
LOAD_FIELD(&dma_video_tcnt, FRAMES_PER_BLOCK, FRAME_COUNT,
FRAME_COUNT_SZ);
LOAD_FIELD(&dma_video_tcnt, NUM_ELEMENTS, ELEMENT_COUNT,
ELEMENT_COUNT_SZ);
/*
* The tcnt has been refreshed, so now we just have to
* reload the dma_init function again.
*/
dma_init(
VIDEO_DMA,
dma_video_prim_ctrl,
dma_video_sec_ctrl,
DMA_VIDEO_SRC_ADDR,
vid_addr_global,
dma_video_tcnt);
/*
* Enable the IRQ7 interrupt again, so we can get a new image when
* it becomes available. Also, the block_cond bit of the
* secondary control register will need to be reset, so we can tell when
* the next dma transfer is completed.
*/
INTR_ENABLE(CPU_INT7);
RESET_REG_BIT(DMA0_SECONDARY_CTRL,BLOCK_COND);
}
/*
* start_video_transfer() -
*
* This function starts the transfer of the block of video data
* (an entire image). It does this by disabling the IRQ7, so the calling
* DMA functions cannot be interrupted, and then the DMA for the video is
* started.
*/
interrupt void start_video_transfer()
{
INTR_DISABLE(CPU_INT7);
DMA_START(VIDEO_DMA);
}
/*
* refresh_audio_DMA() -
*
* This function refreshes the audio DMA registers after the
* completion of the 4000 elements from the VBAP
*/
interrupt void refresh_audio_DMA()
{
// Temporarily halt the audio DMA channel
DMA_STOP(AUDIO_DMA);
/*
* Refreshing the element count in the transfer count register
*/
LOAD_FIELD(&dma_audio_tcnt, AUD_ELEM_NUM, ELEMENT_COUNT,
ELEMENT_COUNT_SZ);
// Reload the dma registers.
dma_init(
AUDIO_DMA,
dma_audio_prim_ctrl,
dma_audio_sec_ctrl,
MCBSP_DRR_ADDR(1),
aud_addr_global,
dma_audio_tcnt);
/*
* Clear the frame condition in the secondary audio dma register
*/
RESET_REG_BIT(DMA1_SECONDARY_CTRL, BLOCK_COND);
/*
* Restart the audio DMA channel
*/
DMA_START(AUDIO_DMA);
}
/*
* refresh_and_manip_data_DMA() -
*
* This function refreshes the data DMA, and also alters
* the received stream into 32 bit data segments.
*/
interrupt void refresh_and_manip_data_DMA()
{
int i,j;
uint ourdata = 0;
uint ourbyte = 0;
short cnt = -1; // used for determining position in the receive buffer
// relative to data
short rec_val;
unsigned short raw_data;
unsigned short *buffptr;
/*
* Temporarily stop the DMA channel
*/
DMA_STOP(DATA_DMA);
/*
* Refreshing the dma registers associated with the serial data
*/
LOAD_FIELD(&dma_data_tcnt, 1, FRAME_COUNT, FRAME_COUNT_SZ);
LOAD_FIELD(&dma_data_tcnt, DATA_ELEM_NUM, ELEMENT_COUNT,
ELEMENT_COUNT_SZ);
dma_init(
DATA_DMA,
dma_data_prim_ctrl,
dma_data_sec_ctrl,
MCBSP_DRR_ADDR(0),
datarecaddr,
dma_data_tcnt);
/*
* Rearrange the stored in our received data register (at UARTRECADDR)
* into 32-bit words
*/
buffptr = (unsigned short *) UARTRECADDR;
for (i = 0; i < DATA_ELEM_NUM; i++) {
rec_val = 0;
// The loop below is the loop associated with connecting the
// bytes together into a 32-bit structure.
for (j = 0; j < 4; j++) {
for (cnt = -1; cnt < 10; cnt++) {
if ((cnt == -1) || (cnt == 8) || (cnt == 9)) {
// ignoring the start and stop bits
buffptr++;
} else {
raw_data = *buffptr;
buffptr++;
// Determine whether the data was a logical
// '1' or '0'
switch ((raw_data >> 6) & 0xf) {
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
case 6:
case 8:
case 9:
case 10:
rec_val = 0;
break;
case 7:
case 11:
case 12:
case 13:
case 14:
case 15:
rec_val = 1;
break;
}
ourbyte += rec_val << cnt;
}
}
// We now have a total byte, so insert it into our unsigned int,
// but only if the uint has not been filled.
ourdata = ourbyte << (j*8);
}
// The 32-bit structure is now completely full, so write it into the
// correct memory location.
*datastorage = ourdata;
if (datastorage == (float *)(0x033FC7F)) {
datastorage = (float *)(0x03000000);
} else {
datastorage++;
}
}
}
/*
* init_int_data_dma() -
*
* This function is called when an internal DMA transfer is required
* to be completed.
*/
void init_int_data_dma(float *dest, int destStep, float *source, int sourceStep, int floats, int frames, int
frameStep)
{
/*
* Internal Data Setup
*
* This section is concerned with the setting up of the
* internal data transfer DMA.
*/
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_RELOAD_NONE, DST_RELOAD,
DST_RELOAD_SZ);
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_RELOAD_NONE, SRC_RELOAD,
SRC_RELOAD_SZ);
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_NO_EM_HALT , EMOD , 1 );
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_CPU_PRI , PRI , 1 );
LOAD_FIELD(&dma_int_data_prim_ctrl, SEN_NONE , WSYNC , WSYNC_SZ );
LOAD_FIELD(&dma_int_data_prim_ctrl, SEN_NONE , RSYNC , RSYNC_SZ );
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_CNT_RELOADA, CNT_RELOAD, 1 );
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_SPLIT_DIS , SPLIT , SPLIT_SZ );
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ESIZE32 , ESIZE , ESIZE_SZ );
/*
* Setting up how the pointer to the destination address is modified
* at the end of the transfer
*/
switch (destStep) {
case -1:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_DEC, DST_DIR ,
DST_DIR_SZ );
break;
case 0:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_NO_MOD,
DST_DIR , DST_DIR_SZ );
break;
case 1:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_INC, DST_DIR ,
DST_DIR_SZ );
break;
default:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_INDX, DST_DIR ,
DST_DIR_SZ );
break;
}
/*
* Setting up how the pointer to the source address is modified at the
* end of the transfer
*/
switch (sourceStep) {
case -1:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_DEC, SRC_DIR,
SRC_DIR_SZ );
break;
case 0:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_NO_MOD,
SRC_DIR, SRC_DIR_SZ );
break;
case 1:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_INC, SRC_DIR,
SRC_DIR_SZ );
break;
default:
LOAD_FIELD(&dma_int_data_prim_ctrl, DMA_ADDR_INDX, SRC_DIR,
SRC_DIR_SZ );
break;
}
/* Set up internal data DMA Tranfer Count Register */
LOAD_FIELD(&dma_int_data_tcnt, floats, ELEMENT_COUNT, ELEMENT_COUNT_SZ);
LOAD_FIELD(&dma_int_data_tcnt, frames, FRAME_COUNT, FRAME_COUNT_SZ);
/*
* Casting and setting the source and dest pointers
*/
dma_int_data_src_addr = (unsigned int)source;
dma_int_data_dst_addr = (unsigned int)dest;
/*
* Setting up the global registers for the internal data transfer
*/
LOAD_FIELD(&dma_gcrb, floats, ELEMENT_COUNT_RELOAD,
ELEMENT_COUNT_RELOAD_SZ);
LOAD_FIELD(&dma_gndxb, frameStep - (floats-1)*4, FRAME_INDEX,
FRAME_INDEX_SZ);
if (ABS(destStep) > 1) { /* If destStep is non-generic */
LOAD_FIELD(&dma_gndxb, destStep, ELEMENT_INDEX,
ELEMENT_INDEX_SZ);
} else if (ABS(sourceStep)> 1) { /* If sourceStep is non-generic */
LOAD_FIELD(&dma_gndxb, sourceStep, ELEMENT_INDEX,
ELEMENT_INDEX_SZ);
}
/*
* Initialising the Internal Data DMA controller
*/
dma_init(
INT_DATA_DMA,
dma_int_data_prim_ctrl,
dma_int_data_sec_ctrl,
dma_int_data_src_addr,
dma_int_data_dst_addr,
dma_int_data_tcnt);
/*
* Setting up the global DMA for use with the inter
* data transfer function.
*/
dma_global_init(
0x0, // aux control reg
dma_gcra, // multiframe video transfers
dma_gcrb, // global count reload B - used in internal transfers.
dma_gndxa, // programmable index for reloading video dst addresses
dma_gndxb, // global index reg B - not used
0x0, // global addr register A - not used
0x0, // global addr register B - not used
0x0, // global addr register C - not used
0x0); // global addr register D - not used
}