** INPUT PARAMETERS:*    LAN91C96_ContextT *ctxP - Pointer to the LAN91C96 Device Context Structure*    UINT16 offset - Offset within the EEPROM to read.** RETURNS:*    Contents of the EEPROM at the specified location.** GLOBAL EFFECTS:*    None.** ASSUMPTIONS:*    None.** CALLS:*    WriteByte, WriteWord, ReadWord, getTimer, getDelta, LOGERROR** CALLED BY:*    LAN91C96HWSetup** PROTOTYPE:*    static*    UINT16 ReadEEPROM(LAN91C96_ContextT *ctxP, UINT16 offset);*********************************************************************************/staticUINT16 ReadEEPROM(LAN91C96_ContextT *ctxP, UINT16 offset){    PVUINT32 ioRegsP = ctxP->LAN91C96IoP;     // Get pointer to I/O space    UINT16   lanReg;                          // Temporary holding register    unsigned long start, timebase = __TIMEBASE ; //ostCtxP->getTimebase_fnp(ostCtxP);    UINT timeout = (UINT)((LAN91C96_TO_EEPROM * timebase)>>20);    // Assume success.    ctxP->loggedError = 0;    // Select Bank 2    WriteByte(BANK2, &ioRegsP[LAN91C96_BANK_SELECT]);    // Set the LAN91C96 pointer register to the specified EEPROM address.    WriteWord(offset, &ioRegsP[LAN91C96_POINTER]);    // Select Bank 1    WriteByte(BANK1, &ioRegsP[LAN91C96_BANK_SELECT]);    // Read the Control Register.    lanReg = ReadWord(&ioRegsP[LAN91C96_CONTROL]);    // The LAN91C96 reads the Configuration, Base and Individual Address, and    // STORE writes the Configuration and Base registers. Also when set it will     // read the EEPROM and update relevant registers with its contents. This bit    // then Clears upon completing the operation.    lanReg |= (LAN91C96_CTR_RELOAD | LAN91C96_CTR_EEPROM);    // Store the data to EEPROM.    WriteWord(lanReg, &ioRegsP[LAN91C96_CONTROL]);    // Prepare for timeout by getting the initial time interval.    hal_clock_read((cyg_uint32 *)&start) ;    // Verify that the data was read successfully. This assumes Bank 1 has    // been selected from the previous operation.    while (1)    {        // Read the Control Register.        lanReg = ReadWord(&ioRegsP[LAN91C96_CONTROL]);        // Only interested in the STORE and RELOAD bits.        lanReg &= (LAN91C96_CTR_STORE | LAN91C96_CTR_RELOAD);        // Complete when the STORE and RELOAD bits are cleared.        if (0 == lanReg)        {            break;        }        // Get the current time interval.				//hal_elapsed_ticks(&start) ;				//printf("currTimerValue-start=%d\n", currTimerValue-start) ;        if (hal_elapsed_ticks(&start) > timeout)        {         /*   LOGERROR(ctxP->loggedError, ERR_L_LAN91C96, ERR_LAN91C96_EEPROM,                     ERR_T_TIMEOUT, 0, 0, 0);*/            printf("ReadEEPROM:LAN91C96: Access timeout!");            return (-1);        }				    }    // Read the EEPROM data and return.    return (ReadWord(&ioRegsP[LAN91C96_GEN_PURPOSE]));}/********************************************************************************** FUNCTION:*    WriteEEPROM** DESCRIPTION:*    This routine provides access to the 64 x 16-bit EEPROM attached to the*    LAN91C96.  The procedure for accessing the EEPROM are described in the*    LAN91C96 data sheet on pages 98 - 100.** INPUT PARAMETERS:*    LAN91C96_ContextT *ctxP - Pointer to the LAN91C96 Device Context Structure*    UINT16 offset - Offset within the EEPROM to write.*    UINT16 value - Value to write into EEPROM.** RETURNS:*    None.** GLOBAL EFFECTS:*    None.** ASSUMPTIONS:*    None.** CALLS:*    WriteByte, WriteWord, ReadWord, getTimer, getDelta, LOGERROR** CALLED BY:*    LAN91C96HWSetup** PROTOTYPE:*    static*    VOID WriteEEPROM(LAN91C96_ContextT *ctxP, UINT16 offset, UINT16 value);*********************************************************************************/staticVOID WriteEEPROM(LAN91C96_ContextT *ctxP, UINT16 offset, UINT16 value){    PVUINT32 ioRegsP = ctxP->LAN91C96IoP;     // Get pointer to I/O space    UINT16   lanReg;                          // Temporary holding register    UINT32 start ;     UINT32 timeout = (UINT32)((LAN91C96_TO_EEPROM * (3686400>>7))>>13);    // Assume success.    ctxP->loggedError = 0;    // Select Bank 2    WriteByte(BANK2, &ioRegsP[LAN91C96_BANK_SELECT]);    // Set the LAN91C96 pointer register to the specified EEPROM address.    WriteWord(offset, &ioRegsP[LAN91C96_POINTER]);    // Select Bank 1    WriteByte(BANK1, &ioRegsP[LAN91C96_BANK_SELECT]);    // Write the specified data to the EEPROM.    WriteWord(value, &ioRegsP[LAN91C96_GEN_PURPOSE]);    // Read the Control Register. This assumes Bank1 is selected.    lanReg = ReadWord(&ioRegsP[LAN91C96_CONTROL]);    // The STORE LAN91C96 bit when set, stores the contents of all relevant    // registers in the serial EEPROM. This bit is cleared upon completing    // the operation.    //    // Note: When an EEPROM access is in progress the STORE and RELOAD bits    // will be read back as high. The remaining 14 bits of this registers will    // be invalid. During this time, attempted read/write operations, other    // than polling the EEPROM status, will NOT have any effect the internal    // registers. The CPU can resume accesses to the LAN91C96 after both bits    // are low. A worst case RELOAD operation initated by RESET or by software    // takes less than 750 usec in either mode.    lanReg |= (LAN91C96_CTR_STORE | LAN91C96_CTR_EEPROM);    // Store the data to EEPROM. This assumes Bank 1 is selected.    WriteWord(lanReg, &ioRegsP[LAN91C96_CONTROL]);    // Prepare for timeout by getting the initial time interval.    hal_clock_read(&start) ;    // Verify that the data was read successfully. This assumes Bank 1 has    // been selected from the previous operation.    while (1)    {        // Read the Control Register.        lanReg = ReadWord(&ioRegsP[LAN91C96_CONTROL]);        // Only interested in the STORE and RELOAD bits.        lanReg &= (LAN91C96_CTR_STORE | LAN91C96_CTR_RELOAD);        // Complete when the STORE and RELOAD bits are cleared.        if (0 == lanReg)        {            break;        }				//printf("WriteEEPROM:currTimerValue-start=%d\n", start) ;        if (hal_elapsed_ticks((unsigned long *)&start) > timeout)        {         /*   LOGERROR(ctxP->loggedError, ERR_L_LAN91C96, ERR_LAN91C96_EEPROM,                     ERR_T_TIMEOUT, 0, 0, 0);*/            printf("WriteEEPROM:LAN91C96: Access timeout!\n");            return;        }				    }}/********************************************************************************** FUNCTION:*    AllocateTxPacket** DESCRIPTION:*    This routine will allocate a transmit frame from the LAN91C96 MMU.** INPUT PARAMETERS:*    LAN91C96_ContextT *ctxP - Pointer to the LAN91C96 Device Context Structure*    INT length - Size of the transmit buffer.*    PUINT16 handle - Returned frame number.** RETURNS:*    0 - Error, error code in ctxP->loggedError.*    non-zero - The allocated frame number.** GLOBAL EFFECTS:*    None.** ASSUMPTIONS:*    None.** CALLS:*    WriteByte - To write a byte to either the attribute or I/O space.*    WriteWord - To write a word to either the attribute or I/O space.*    ReadByte - Read a byte from either the attribute or I/O space.*    ReadWord - Read a word from either the attribute or I/O space.*    DM_ErrPrintf - Display error string.*    LOGERROR - Logs errors encountered.** CALLED BY:*    LAN91C96HWSetup, LAN91C96TransmitPacket.** PROTOTYPE:*    static*    INT AllocateTxPacket(LAN91C96_ContextT *ctxP, INT length);**    See page 36 in the LAN91C96 specification for details.**    RAM*  Offset    15         8          0*            +---------------------+*     0      \    Status Word      \    Transmit/Receive Status*            \---------------------\*     2      \ RESVD \  Byte Count \    Total number of bytes in frame *            \---------------------\*     4      \                     \*            ~      Data Area      ~    Data packet*            ~                     ~*            \                     \*            \---------------------\*  1536 Max  \ Control  \ Odd byte \    Control status and/or last data byte* (6 x 256)  +---------------------+** The minimum Ethernet frame on the wire includes the following:*     Inter Frame Gap - 12 Bytes*     MAC Preamble - 8 Bytes *     MAC Destination Address - 6 Bytes *     MAC Source Address - 6 Bytes *     MAC Type (or Length) - 2 Bytes *     Payload (Network PDU) - 46 Bytes *     Check Sequence (CRC) - 4 Bytes *     Total Frame Physical Size - 84 Bytes ** The maximum Ethernet frame on the wire includes the following:*    Inter Frame Gap - 12 Bytes *    MAC Preamble - 8 Bytes *    MAC Destination Address - 6 Bytes *    MAC Source Address -  6 Bytes *    MAC Type (or Length) - 2 Bytes *    Payload (Network PDU) - 1500 Bytes *    Check Sequence (CRC) - 4 Bytes *   Total Frame Physical Size - 1538 Bytes ** The LAN91C96 MMU consists of 24 pages each 256 bytes for a maximum of* 6144 bytes. The maximum number of pages per packet is 6, thus the maximum* size packet is 1536 bytes.** Each packet contains 5 bytes of overhead, 2 for the Status Word, 2 for* the byte count and 1 byte for control information.** The Status Word for a transmit is as follows:* 15                                                                         0* +--------------------------------------------------------------------------+* \ TX UNRN \ LINK_OK \ RES \ CTR_ROL \ EXC_DEF\ LOST CARR \ LASTCOL\ WAKEUP \* +--------------------------------------------------------------------------+* \ TX DEFR \ LTX BRD \ SQET \ 16COL \ LTX MULT \ MUL COL \ SNGL COL \ TX_SUC\* +--------------------------------------------------------------------------+** The Status Word for a receive is as follows:* 15                                                                         0* +--------------------------------------------------------------------------+* \ ALGN ERR \ BROD CAST \ BADCRC \ ODDFRM \ TOOLNG \ TOO SHORT\       \     \* +--------------------------------------------------------------------------+* \          \                   Hash Value                           \ MULT \* +          \--------------------------------------------------------\ CAST \  * \          \    5   \    4   \    3    \    2   \    1    \    0    \      \    * +--------------------------------------------------------------------------+** The Byte Count is the total number of words including the Status Word,* the Byte Count Word, the Data Area and the Control Byte divided by 2.** The Data Area contains the Ethernet header and the payload. The maximum size* Ethernet packet is 1514.** The Data Area is used to store the frame. The Ethernet header contains 14* bytes of information. The header includes 6 bytes for the destination* address, 6 bytes for the source address and 2 bytes for the protocol type.* The payload follows the Ethernet header and can be a maximum of 1500 bytes.* The data area does not include the 4 bytes needed on the wire for the CRC.** The Control Byte is as follows:* +---------------------------------------------------------------+* \   X   \   X   \  ODD  \  CRC  \   0   \   0   \   0   \   0   \* +---------------------------------------------------------------+** If the ODD bit is set, the last byte is right before the Control Byte.*********************************************************************************/externINT AllocateTxPacket(LAN91C96_ContextT *ctxP, INT length, PUINT16 handle){    PVUINT32 ioRegsP = ctxP->LAN91C96IoP;     // Get pointer to I/O space    UINT start, currTimerValue ;    UINT timeout = (UINT)((LAN91C96_TO_ALLOC * 3686400) >> 20) ;    UINT16 resultCode;    UINT16 bufferSize;    UINT16 tempHandle;    // Calculate the memory needed. This includes the status word, byte count    // data and control rounded up.    bufferSize = sizeof(UINT16) + sizeof(UINT16) + length + 1;    if (bufferSize & 1)    {        // Round the size up.        bufferSize++;    }    // Make sure we aren't attempting to send the maximum size Ethernet packet.    if ((bufferSize >> 8) > LAN91C96_MAX_PAGES)    {//      printf("in AllocateTxPacket - attempting to send the maximum size Ethernet packet.\n") ;        // Report the error.        return (1);    }    // Select Bank 2    WriteByte(BANK2, &ioRegsP[LAN91C96_BANK_SELECT]);    // Allocate memory in the buffer for the frame. The amount requested    // is specified by dividing the buffer size by 256.    WriteWord(LAN91C96_MMUCR_ALLOC_TX | (bufferSize >> 8),              &ioRegsP[LAN91C96_MMU]);    // Prepare for timeout by getting the initial time interval.    hal_clock_read(&start) ;//ostCtxP->getTimer_fnp(ostCtxP);    // Wait for the request to complete by monitoring the ALLOC INT bit in    // the Interrupt Status Register.    while (!ReadByte(&ioRegsP[LAN91C96_INT_STATS]) & LAN91C96_IST_ALLOC_INT)    {        // Get the current time interval.				hal_clock_read(&currTimerValue) ;        if (hal_elapsed_ticks((unsigned long *)&start) > timeout)        {            // Get the status word for display.            WriteWord(LAN91C96_PTR_READ, &ioRegsP[LAN91C96_POINTER]);            resultCode = ReadWord(&ioRegsP[LAN91C96_DATA_HIGH]);                        //printf("LAN91C96: Buffer allocation timeout\n");            return (-1);        }    }    // Get the packet number just allocated.    tempHandle = ReadWord(&ioRegsP[LAN91C96_PNR]);    *handle = tempHandle >> 8;    return (0);}/********************************************************************************** FUNCTION:*    DeallocateTxPacket** DESCRIPTION:*    This routine will deallocate a transmit buffer and clear any errors.** INPUT PARAMETERS:*    LAN91C96_ContextT *ctxP - Pointer to the LAN91C96 Device Context Structure** RETURNS:*    0 - Success*    non-zero - Error** GLOBAL EFFECTS:*    None.** ASSUMPTIONS:*    None.** CALLS:*    WriteByte - To write a byte to either the attribute or I/O space.*    WriteWord - To write a word to either the attribute or I/O space.*    ReadByte - Read a byte from either the attribute or I/O space.*    ReadWord - Read a word from either the attribute or I/O space.** CALLED BY:*    static*    LAN91C96HWSetup, LAN91C96TransmitPacket** PROTOTYPE:*    INT DeallocateTxPacket(LAN91C96_ContextT *ctxP);*********************************************************************************/externINT DeallocateTxPacket(LAN91C96_ContextT *ctxP){    PVUINT32 ioRegsP = ctxP->LAN91C96IoP;     // Get pointer to I/O space    UINT start, currTimerValue ;    UINT timeout = (UINT)((LAN91C96_TO_ALLOC * 3686400) >> 20) ;    UINT16 resultCode;    UCHAR intStatus;    // Select Bank 2    WriteByte(BANK2, &ioRegsP[LAN91C96_BANK_SELECT]);