}		/* Latency issues. Drop the lock, wait a while and retry */		spin_unlock_bh(chip->mutex);		cfi_udelay(1);		goto retry;	default:		/* Stick ourselves on a wait queue to be woken when		   someone changes the status */		set_current_state(TASK_UNINTERRUPTIBLE);		add_wait_queue(&chip->wq, &wait);		spin_unlock_bh(chip->mutex);		schedule();		remove_wait_queue(&chip->wq, &wait);		timeo = jiffies + HZ;		goto retry;	}	ENABLE_VPP(map);	map_write(map, CMD(0xe8), cmd_adr);	chip->state = FL_WRITING_TO_BUFFER;	z = 0;	for (;;) {		status = map_read(map, cmd_adr);		if (map_word_andequal(map, status, status_OK, status_OK))			break;		spin_unlock_bh(chip->mutex);		cfi_udelay(1);		spin_lock_bh(chip->mutex);		if (++z > 100) {			/* Argh. Not ready for write to buffer */			DISABLE_VPP(map);                        map_write(map, CMD(0x70), cmd_adr);			chip->state = FL_STATUS;			spin_unlock_bh(chip->mutex);			printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx\n", status.x[0]);			return -EIO;		}	}	/* Write length of data to come */	map_write(map, CMD(len/map_bankwidth(map)-1), cmd_adr );	/* Write data */	for (z = 0; z < len;	     z += map_bankwidth(map), buf += map_bankwidth(map)) {		map_word d;		d = map_word_load(map, buf);		map_write(map, d, adr+z);	}	/* GO GO GO */	map_write(map, CMD(0xd0), cmd_adr);	chip->state = FL_WRITING;	spin_unlock_bh(chip->mutex);	cfi_udelay(chip->buffer_write_time);	spin_lock_bh(chip->mutex);	timeo = jiffies + (HZ/2);	z = 0;	for (;;) {		if (chip->state != FL_WRITING) {			/* Someone's suspended the write. Sleep */			set_current_state(TASK_UNINTERRUPTIBLE);			add_wait_queue(&chip->wq, &wait);			spin_unlock_bh(chip->mutex);			schedule();			remove_wait_queue(&chip->wq, &wait);			timeo = jiffies + (HZ / 2); /* FIXME */			spin_lock_bh(chip->mutex);			continue;		}		status = map_read(map, cmd_adr);		if (map_word_andequal(map, status, status_OK, status_OK))			break;		/* OK Still waiting */		if (time_after(jiffies, timeo)) {                        /* clear status */                        map_write(map, CMD(0x50), cmd_adr);                        /* put back into read status register mode */                        map_write(map, CMD(0x70), adr);			chip->state = FL_STATUS;			DISABLE_VPP(map);			spin_unlock_bh(chip->mutex);			printk(KERN_ERR "waiting for chip to be ready timed out in bufwrite\n");			return -EIO;		}		/* Latency issues. Drop the lock, wait a while and retry */		spin_unlock_bh(chip->mutex);		cfi_udelay(1);		z++;		spin_lock_bh(chip->mutex);	}	if (!z) {		chip->buffer_write_time--;		if (!chip->buffer_write_time)			chip->buffer_write_time++;	}	if (z > 1)		chip->buffer_write_time++;	/* Done and happy. */	DISABLE_VPP(map);	chip->state = FL_STATUS;        /* check for errors: 'lock bit', 'VPP', 'dead cell'/'unerased cell' or 'incorrect cmd' -- saw */        if (map_word_bitsset(map, status, CMD(0x3a))) {#ifdef DEBUG_CFI_FEATURES		printk("%s: 2 status[%lx]\n", __FUNCTION__, status.x[0]);#endif		/* clear status */		map_write(map, CMD(0x50), cmd_adr);		/* put back into read status register mode */		map_write(map, CMD(0x70), adr);		wake_up(&chip->wq);		spin_unlock_bh(chip->mutex);		return map_word_bitsset(map, status, CMD(0x02)) ? -EROFS : -EIO;	}	wake_up(&chip->wq);	spin_unlock_bh(chip->mutex);        return 0;}static int cfi_staa_write_buffers (struct mtd_info *mtd, loff_t to,				       size_t len, size_t *retlen, const u_char *buf){	struct map_info *map = mtd->priv;	struct cfi_private *cfi = map->fldrv_priv;	int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;	int ret = 0;	int chipnum;	unsigned long ofs;	*retlen = 0;	if (!len)		return 0;	chipnum = to >> cfi->chipshift;	ofs = to  - (chipnum << cfi->chipshift);#ifdef DEBUG_CFI_FEATURES        printk("%s: map_bankwidth(map)[%x]\n", __FUNCTION__, map_bankwidth(map));        printk("%s: chipnum[%x] wbufsize[%x]\n", __FUNCTION__, chipnum, wbufsize);        printk("%s: ofs[%x] len[%x]\n", __FUNCTION__, ofs, len);#endif        /* Write buffer is worth it only if more than one word to write... */        while (len > 0) {		/* We must not cross write block boundaries */		int size = wbufsize - (ofs & (wbufsize-1));                if (size > len)                    size = len;                ret = do_write_buffer(map, &cfi->chips[chipnum],				      ofs, buf, size);		if (ret)			return ret;		ofs += size;		buf += size;		(*retlen) += size;		len -= size;		if (ofs >> cfi->chipshift) {			chipnum ++;			ofs = 0;			if (chipnum == cfi->numchips)				return 0;		}	}	return 0;}/* * Writev for ECC-Flashes is a little more complicated. We need to maintain * a small buffer for this. * XXX: If the buffer size is not a multiple of 2, this will break */#define ECCBUF_SIZE (mtd->eccsize)#define ECCBUF_DIV(x) ((x) & ~(ECCBUF_SIZE - 1))#define ECCBUF_MOD(x) ((x) &  (ECCBUF_SIZE - 1))static intcfi_staa_writev(struct mtd_info *mtd, const struct kvec *vecs,		unsigned long count, loff_t to, size_t *retlen){	unsigned long i;	size_t	 totlen = 0, thislen;	int	 ret = 0;	size_t	 buflen = 0;	static char *buffer;	if (!ECCBUF_SIZE) {		/* We should fall back to a general writev implementation.		 * Until that is written, just break.		 */		return -EIO;	}	buffer = kmalloc(ECCBUF_SIZE, GFP_KERNEL);	if (!buffer)		return -ENOMEM;	for (i=0; i<count; i++) {		size_t elem_len = vecs[i].iov_len;		void *elem_base = vecs[i].iov_base;		if (!elem_len) /* FIXME: Might be unnecessary. Check that */			continue;		if (buflen) { /* cut off head */			if (buflen + elem_len < ECCBUF_SIZE) { /* just accumulate */				memcpy(buffer+buflen, elem_base, elem_len);				buflen += elem_len;				continue;			}			memcpy(buffer+buflen, elem_base, ECCBUF_SIZE-buflen);			ret = mtd->write(mtd, to, ECCBUF_SIZE, &thislen, buffer);			totlen += thislen;			if (ret || thislen != ECCBUF_SIZE)				goto write_error;			elem_len -= thislen-buflen;			elem_base += thislen-buflen;			to += ECCBUF_SIZE;		}		if (ECCBUF_DIV(elem_len)) { /* write clean aligned data */			ret = mtd->write(mtd, to, ECCBUF_DIV(elem_len), &thislen, elem_base);			totlen += thislen;			if (ret || thislen != ECCBUF_DIV(elem_len))				goto write_error;			to += thislen;		}		buflen = ECCBUF_MOD(elem_len); /* cut off tail */		if (buflen) {			memset(buffer, 0xff, ECCBUF_SIZE);			memcpy(buffer, elem_base + thislen, buflen);		}	}	if (buflen) { /* flush last page, even if not full */		/* This is sometimes intended behaviour, really */		ret = mtd->write(mtd, to, buflen, &thislen, buffer);		totlen += thislen;		if (ret || thislen != ECCBUF_SIZE)			goto write_error;	}write_error:	if (retlen)		*retlen = totlen;	kfree(buffer);	return ret;}static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr){	struct cfi_private *cfi = map->fldrv_priv;	map_word status, status_OK;	unsigned long timeo;	int retries = 3;	DECLARE_WAITQUEUE(wait, current);	int ret = 0;	adr += chip->start;	/* Let's determine this according to the interleave only once */	status_OK = CMD(0x80);	timeo = jiffies + HZ;retry:	spin_lock_bh(chip->mutex);	/* Check that the chip's ready to talk to us. */	switch (chip->state) {	case FL_CFI_QUERY:	case FL_JEDEC_QUERY:	case FL_READY:		map_write(map, CMD(0x70), adr);		chip->state = FL_STATUS;	case FL_STATUS:		status = map_read(map, adr);		if (map_word_andequal(map, status, status_OK, status_OK))			break;		/* Urgh. Chip not yet ready to talk to us. */		if (time_after(jiffies, timeo)) {			spin_unlock_bh(chip->mutex);			printk(KERN_ERR "waiting for chip to be ready timed out in erase\n");			return -EIO;		}		/* Latency issues. Drop the lock, wait a while and retry */		spin_unlock_bh(chip->mutex);		cfi_udelay(1);		goto retry;	default:		/* Stick ourselves on a wait queue to be woken when		   someone changes the status */		set_current_state(TASK_UNINTERRUPTIBLE);		add_wait_queue(&chip->wq, &wait);		spin_unlock_bh(chip->mutex);		schedule();		remove_wait_queue(&chip->wq, &wait);		timeo = jiffies + HZ;		goto retry;	}	ENABLE_VPP(map);	/* Clear the status register first */	map_write(map, CMD(0x50), adr);	/* Now erase */	map_write(map, CMD(0x20), adr);	map_write(map, CMD(0xD0), adr);	chip->state = FL_ERASING;	spin_unlock_bh(chip->mutex);	msleep(1000);	spin_lock_bh(chip->mutex);	/* FIXME. Use a timer to check this, and return immediately. */	/* Once the state machine's known to be working I'll do that */	timeo = jiffies + (HZ*20);	for (;;) {		if (chip->state != FL_ERASING) {			/* Someone's suspended the erase. Sleep */			set_current_state(TASK_UNINTERRUPTIBLE);			add_wait_queue(&chip->wq, &wait);			spin_unlock_bh(chip->mutex);			schedule();			remove_wait_queue(&chip->wq, &wait);			timeo = jiffies + (HZ*20); /* FIXME */			spin_lock_bh(chip->mutex);			continue;		}		status = map_read(map, adr);		if (map_word_andequal(map, status, status_OK, status_OK))			break;		/* OK Still waiting */		if (time_after(jiffies, timeo)) {			map_write(map, CMD(0x70), adr);			chip->state = FL_STATUS;			printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);			DISABLE_VPP(map);			spin_unlock_bh(chip->mutex);			return -EIO;		}		/* Latency issues. Drop the lock, wait a while and retry */		spin_unlock_bh(chip->mutex);		cfi_udelay(1);		spin_lock_bh(chip->mutex);	}	DISABLE_VPP(map);	ret = 0;	/* We've broken this before. It doesn't hurt to be safe */	map_write(map, CMD(0x70), adr);	chip->state = FL_STATUS;	status = map_read(map, adr);	/* check for lock bit */	if (map_word_bitsset(map, status, CMD(0x3a))) {		unsigned char chipstatus = status.x[0];		if (!map_word_equal(map, status, CMD(chipstatus))) {			int i, w;			for (w=0; w<map_words(map); w++) {				for (i = 0; i<cfi_interleave(cfi); i++) {					chipstatus |= status.x[w] >> (cfi->device_type * 8);				}			}			printk(KERN_WARNING "Status is not identical for all chips: 0x%lx. Merging to give 0x%02x\n",			       status.x[0], chipstatus);		}		/* Reset the error bits */		map_write(map, CMD(0x50), adr);		map_write(map, CMD(0x70), adr);		if ((chipstatus & 0x30) == 0x30) {			printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%x\n", chipstatus);			ret = -EIO;		} else if (chipstatus & 0x02) {			/* Protection bit set */			ret = -EROFS;		} else if (chipstatus & 0x8) {			/* Voltage */			printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%x\n", chipstatus);			ret = -EIO;		} else if (chipstatus & 0x20) {			if (retries--) {				printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, chipstatus);				timeo = jiffies + HZ;				chip->state = FL_STATUS;				spin_unlock_bh(chip->mutex);				goto retry;			}			printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, chipstatus);			ret = -EIO;		}	}	wake_up(&chip->wq);	spin_unlock_bh(chip->mutex);	return ret;}int cfi_staa_erase_varsize(struct mtd_info *mtd, struct erase_info *instr){	struct map_info *map = mtd->priv;	struct cfi_private *cfi = map->fldrv_priv;	unsigned long adr, len;	int chipnum, ret = 0;	int i, first;	struct mtd_erase_region_info *regions = mtd->eraseregions;	if (instr->addr > mtd->size)		return -EINVAL;	if ((instr->len + instr->addr) > mtd->size)		return -EINVAL;	/* Check that both start and end of the requested erase are	 * aligned with the erasesize at the appropriate addresses.	 */	i = 0;	/* Skip all erase regions which are ended before the start of	   the requested erase. Actually, to save on the calculations,	   we skip to the first erase region which starts after the	   start of the requested erase, and then go back one.	*/	while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)	       i++;	i--;	/* OK, now i is pointing at the erase region in which this	   erase request starts. Check the start of the requested	   erase range is aligned with the erase size which is in	   effect here.	*/	if (instr->addr & (regions[i].erasesize-1))		return -EINVAL;	/* Remember the erase region we start on */	first = i;	/* Next, check that the end of the requested erase is aligned	 * with the erase region at that address.	 */	while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)		i++;	/* As before, drop back one to point at the region in which	   the address actually falls	*/	i--;	if ((instr->addr + instr->len) & (regions[i].erasesize-1))		return -EINVAL;	chipnum = instr->addr >> cfi->chipshift;	adr = instr->addr - (chipnum << cfi->chipshift);	len = instr->len;