AMCC Ebony Board		    Last Update: September 12, 2002=======================================================================This file contains some handy info regarding U-Boot and the AMCCEbony evalutation board. See the README.ppc440 for additionalinformation.SWITCH SETTINGS & JUMPERS==========================Here's what I've been using successfully. If you feel inclined tochange things ... please read the docs!DIPSW   U46         U80------------------------SW 1    off         onSW 2    on          onSW 3    on          onSW 4    off         onSW 5    on          offSW 6    on          onSW 7    on          offSW 8    on          offJ41: strappedJ42: openAll others are factory default.I2C iprobe=====================The i2c utilities have been tested on both Rev B. and Rev C. andlook good. The CFG_I2C_NOPROBES macro is defined to preventprobing the CDCV850 clock controller at address 0x69 (since readingit causes the i2c implementation to misbehave. The output ofiprobe should look like this (assuming you are only using a singleSO-DIMM:=> iprobeValid chip addresses: 50 53 54Excluded chip addresses: 69GETTING OUT OF I2C TROUBLE===========================If you're like me ... you may have screwed up your bootstrap serialeeprom ... or worse, your SPD eeprom when experimenting with thei2c commands. If so, here are some ideas on how to get out oftrouble:Serial bootstrap eeprom corruption:-----------------------------------Power down the board and set the following straps:J41 - openJ42 - strappedThis will select the default sys0 and sys1 settings (the serialeeproms are not used). Then power up the board and fix the serialeeprom using the imm command. Here are the values I currentlyuse:=> imd 50 0 100000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00    ................=> imd 54 0 100000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00    ..$.M...........Once you have the eeproms set correctly change theJ41/J42 straps as you desire.SPD eeprom corruption:------------------------I've corrupted the SPD eeprom several times ... perhaps too much coffeeand not enough presence of mind ;-). By default, the ebony code usesthe SPD to initialize the DDR SDRAM control registers. So if the SPDeeprom is corrupted, U-Boot will never get into ram. Here's how I gotout of this situation:0. First, _before_ playing with the i2c utilities, do an iprobe, thenuse imd to capture the various device contents to a file. Some dayyou may be glad you did this ... trust me :-). Otherwise try thefollowing:1. In the include/configs/EBONY.h file find the line that definesthe CONFIG_SPD_EEPROM macro and undefine it. E.g:#undef CONFIG_SPD_EEPROMThis will make the code use default SDRAM control registersettings without using the SPD eeprom.2. Rebuild U-Boot3. Load the new U-Boot image and reboot ebony.4. Repair the SPD eeprom using the imm command. Here's the eepromcontents that work with the default SO-DIMM that comes with theebony board (micron 8VDDT164AG-265A1). Note: these are probably_not_ the factory settings ... but they work.=> imd 53 0 10 800000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01    ......@..uu.....0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20    ..... ..u..P<P-0020: 90 90 50 50 00 00 00 00 00 41 4b 34 32 75 00 00    ..PP.....AK42u..0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 9c    ................0040: 2c 00 00 00 00 00 00 00 08 38 56 44 44 54 31 36    ,........8VDDT160050: 36 34 41 47 2d 32 36 35 41 31 20 01 00 01 2c 63    64AG-265A1 ...,c0060: 22 25 ab 00 00 00 00 00 00 00 00 00 00 00 00 00    "%..............0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................PCI DOUBLE-ENUMERATION WOES===========================If you're not using PCI-X cards and are simply using 32-bit and/or33 MHz cards via extenders and the like, you may notice that theinitial pci scan reports various devices twice ... and configurationdoes not succeed (one or more devices are enumerated twice). To correctthis we replaced the 2K ohm resistor on the IDSEL line(s) with a22 ohm resistor and the problem went away. This change hasn't brokenanything yet -- use at your own risk.We never tested anything other than 33 MHz/32-bit cards. If you havethe chance to do this, please let me know how things turn out :-)Regards,--Scott<smcnutt@artesyncp.com>