blt	copy_vectors	move.l	#_ramvec, %a1	movec	%a1, %vbr	/* Copy data segment from ROM to RAM */	moveal	#_etext, %a0	moveal	#_sdata, %a1	moveal	#_edata, %a2	/* Copy %a0 to %a1 until %a1 == %a2 */LD1:	move.l	%a0@, %d0	addq.l	#0x04, %a0	move.l	%d0, %a1@	addq.l	#0x04, %a1	cmp.l	#_edata, %a1	blt	LD1	moveal	#_sbss, %a0	moveal	#_ebss, %a1	/* Copy 0 to %a0 until %a0 == %a1 */L1:	movel	#0, %a0@+	cmpal	%a0, %a1	bhi	L1load_quicc:	move.l	#_dprbase, _quicc_basestore_ram_size:	/* Set ram size information */	move.l	#_sdata, _rambase	move.l	#_ebss, _ramstart	move.l	#__ramend, %d0	sub.l	#0x1000, %d0			/* Reserve 4K for stack space.*/	move.l	%d0, _ramend			/* Different from __ramend.*/store_flash_size:	/* Set rom size information */	move.l	#__rom_end, %d0	sub.l	#__rom_start, %d0	move.l	%d0, rom_length    	pea	0	pea	env	pea	%sp@(4)	pea	0	lea	init_thread_union, %a2	lea	0x2000(%a2), %splp:	jsr	start_kernel_exit:	jmp	_exit	.data	.align 4env:	.long	0_quicc_base:	.long	0_periph_base:	.long	0_ramvec:	.long   0_rambase:	.long   0_ramstart:	.long   0_ramend:	.long   0_dprbase:	.long	0xffffe000	.text    /*     * These are the exception vectors at boot up, they are copied into RAM     * and then overwritten as needed.     */ .section ".data.initvect","awx"    .long   __ramend	/* Reset: Initial Stack Pointer                 - 0.  */    .long   _start      /* Reset: Initial Program Counter               - 1.  */    .long   buserr      /* Bus Error                                    - 2.  */    .long   trap        /* Address Error                                - 3.  */    .long   trap        /* Illegal Instruction                          - 4.  */    .long   trap        /* Divide by zero                               - 5.  */    .long   trap        /* CHK, CHK2 Instructions                       - 6.  */    .long   trap        /* TRAPcc, TRAPV Instructions                   - 7.  */    .long   trap        /* Privilege Violation                          - 8.  */    .long   trap        /* Trace                                        - 9.  */    .long   trap        /* Line 1010 Emulator                           - 10. */    .long   trap        /* Line 1111 Emualtor                           - 11. */    .long   trap        /* Harware Breakpoint                           - 12. */    .long   trap        /* (Reserved for Coprocessor Protocol Violation)- 13. */    .long   trap        /* Format Error                                 - 14. */    .long   trap        /* Uninitialized Interrupt                      - 15. */    .long   trap        /* (Unassigned, Reserver)                       - 16. */    .long   trap        /* (Unassigned, Reserver)                       - 17. */    .long   trap        /* (Unassigned, Reserver)                       - 18. */    .long   trap        /* (Unassigned, Reserver)                       - 19. */    .long   trap        /* (Unassigned, Reserver)                       - 20. */    .long   trap        /* (Unassigned, Reserver)                       - 21. */    .long   trap        /* (Unassigned, Reserver)                       - 22. */    .long   trap        /* (Unassigned, Reserver)                       - 23. */    .long   trap        /* Spurious Interrupt                           - 24. */    .long   trap        /* Level 1 Interrupt Autovector                 - 25. */    .long   trap        /* Level 2 Interrupt Autovector                 - 26. */    .long   trap        /* Level 3 Interrupt Autovector                 - 27. */    .long   trap        /* Level 4 Interrupt Autovector                 - 28. */    .long   trap        /* Level 5 Interrupt Autovector                 - 29. */    .long   trap        /* Level 6 Interrupt Autovector                 - 30. */    .long   trap        /* Level 7 Interrupt Autovector                 - 31. */    .long   system_call /* Trap Instruction Vectors 0                   - 32. */    .long   trap        /* Trap Instruction Vectors 1                   - 33. */    .long   trap        /* Trap Instruction Vectors 2                   - 34. */    .long   trap        /* Trap Instruction Vectors 3                   - 35. */    .long   trap        /* Trap Instruction Vectors 4                   - 36. */    .long   trap        /* Trap Instruction Vectors 5                   - 37. */    .long   trap        /* Trap Instruction Vectors 6                   - 38. */    .long   trap        /* Trap Instruction Vectors 7                   - 39. */    .long   trap        /* Trap Instruction Vectors 8                   - 40. */    .long   trap        /* Trap Instruction Vectors 9                   - 41. */    .long   trap        /* Trap Instruction Vectors 10                  - 42. */    .long   trap        /* Trap Instruction Vectors 11                  - 43. */    .long   trap        /* Trap Instruction Vectors 12                  - 44. */    .long   trap        /* Trap Instruction Vectors 13                  - 45. */    .long   trap        /* Trap Instruction Vectors 14                  - 46. */    .long   trap        /* Trap Instruction Vectors 15                  - 47. */    .long   0           /* (Reserved for Coprocessor)                   - 48. */    .long   0           /* (Reserved for Coprocessor)                   - 49. */    .long   0           /* (Reserved for Coprocessor)                   - 50. */    .long   0           /* (Reserved for Coprocessor)                   - 51. */    .long   0           /* (Reserved for Coprocessor)                   - 52. */    .long   0           /* (Reserved for Coprocessor)                   - 53. */    .long   0           /* (Reserved for Coprocessor)                   - 54. */    .long   0           /* (Reserved for Coprocessor)                   - 55. */    .long   0           /* (Reserved for Coprocessor)                   - 56. */    .long   0           /* (Reserved for Coprocessor)                   - 57. */    .long   0           /* (Reserved for Coprocessor)                   - 58. */    .long   0           /* (Unassigned, Reserved)                       - 59. */    .long   0           /* (Unassigned, Reserved)                       - 60. */    .long   0           /* (Unassigned, Reserved)                       - 61. */    .long   0           /* (Unassigned, Reserved)                       - 62. */    .long   0           /* (Unassigned, Reserved)                       - 63. */    /*                  The assignment of these vectors to the CPM is         */    /*                  dependent on the configuration of the CPM vba         */    /*                          fields.                                       */    .long   0           /* (User-Defined Vectors 1) CPM Error           - 64. */    .long   0           /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */    .long   0           /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */    .long   0           /* (User-Defined Vectors 4) CPM SMC2 / PIP      - 67. */    .long   0           /* (User-Defined Vectors 5) CPM SMC1            - 68. */    .long   0           /* (User-Defined Vectors 6) CPM SPI             - 69. */    .long   0           /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */    .long   0           /* (User-Defined Vectors 8) CPM Timer 4         - 71. */    .long   0           /* (User-Defined Vectors 9) CPM Reserved        - 72. */    .long   0           /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */    .long   0           /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */    .long   0           /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */    .long   0           /* (User-Defined Vectors 13) CPM Timer 3        - 76. */    .long   0           /* (User-Defined Vectors 14) CPM Reserved       - 77. */    .long   0           /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */    .long   0           /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */    .long   0           /* (User-Defined Vectors 17) CPM Reserved       - 80. */    .long   0           /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */    .long   0           /* (User-Defined Vectors 19) CPM Timer 2        - 82. */    .long   0           /* (User-Defined Vectors 21) CPM Reserved       - 83. */    .long   0           /* (User-Defined Vectors 22) CPM IDMA2          - 84. */    .long   0           /* (User-Defined Vectors 23) CPM IDMA1          - 85. */    .long   0           /* (User-Defined Vectors 24) CPM SDMA Bus Err   - 86. */    .long   0           /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */    .long   0           /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */    .long   0           /* (User-Defined Vectors 27) CPM Timer 1        - 89. */    .long   0           /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */    .long   0           /* (User-Defined Vectors 29) CPM SCC 4          - 91. */    .long   0           /* (User-Defined Vectors 30) CPM SCC 3          - 92. */    .long   0           /* (User-Defined Vectors 31) CPM SCC 2          - 93. */    .long   0           /* (User-Defined Vectors 32) CPM SCC 1          - 94. */    .long   0           /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */    /*                  I don't think anything uses the vectors after here.   */    .long   0           /* (User-Defined Vectors 34)                    - 96. */    .long   0,0,0,0,0               /* (User-Defined Vectors 35  -  39). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 40  -  49). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 50  -  59). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 60  -  69). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 70  -  79). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 80  -  89). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 90  -  99). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 100 - 109). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 110 - 119). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 120 - 129). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 130 - 139). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 140 - 149). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 150 - 159). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 160 - 169). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 170 - 179). */    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 180 - 189). */    .long   0,0,0                   /* (User-Defined Vectors 190 - 192). */.textignore: rte