//*---------------------------------------------------------------------------
//*         CIRRUS EP7312 Software
//*---------------------------------------------------------------------------
//*-----------------------------------------------------------------------------
//* File Name           : EP7312.h
//* Object              : EP7312 Definition File
//*
//* 1.0 11/25/01 	: Creation
//*---------------------------------------------------------------------------

#define    LITTLE_ENDIAN    /*Little Endian Mode*/ 

#ifndef    ep7312_h
#define    ep7312_h

/*--------------------------*/
/* General Purpose IO ports */
/*--------------------------*/

#define		PADATA	(*(volatile unsigned int *)0x80000000)
#define		PADIR	(*(volatile unsigned int *)0x80000040)

#define		GPIO(Nb)	(0x00000001 << (Nb))

#define		PA_0	GPIO(0)
#define		PA_1	GPIO(1)
#define		PA_2	GPIO(2)
#define		PA_3	GPIO(3)
#define		PA_4	GPIO(4)
#define		PA_5	GPIO(5)
#define		PA_6	GPIO(6)
#define		PA_7	GPIO(7)

#define		PB_0	GPIO(8)
#define		PB_1	GPIO(9)
#define		PB_2	GPIO(10)
#define		PB_3	GPIO(11)
#define		PB_4	GPIO(12)
#define		PB_5	GPIO(13)
#define		PB_6	GPIO(14)
#define		PB_7	GPIO(15)

#define		PD_0	GPIO(24)
#define		PD_1	GPIO(25)
#define		PD_2	GPIO(26)
#define		PD_3	GPIO(27)
#define		PD_4	GPIO(28)
#define		PD_5	GPIO(29)
#define		PD_6	GPIO(30)
#define		PD_7	GPIO(31)

#define		PEDATA	(*(volatile unsigned int *)0x80000080)
#define		PEDIR	(*(volatile unsigned int *)0x800000C0)  

#define		PE_0	GPIO(0)
#define		PE_1	GPIO(1);
#define		PE_2	GPIO(2);


#define		BIT_7_SET	0x80
#define		BIT_6_SET	0x40
#define		BIT_5_SET	0x20
#define		BIT_4_SET	0x10
#define		BIT_3_SET	0x08
#define		BIT_2_SET	0x08
#define		BIT_1_SET	0x02
#define		BIT_0_SET	0x01

#define		BIT_7_CLR	0x7F
#define		BIT_6_CLR	0xBF
#define		BIT_5_CLR	0xDF
#define		BIT_4_CLR	0xEF
#define		BIT_3_CLR	0xF7
#define		BIT_2_CLR	0xFB
#define		BIT_1_CLR	0xFD
#define		BIT_0_CLR	0xFE

// SDRAM setup registers
#define		SDCONF()	(*(volatile unsigned int *)0x80002300)
#define		SDRFPR() 	(*(volatile unsigned int *)0x80002340)

// Memory setup registers
#define		MEMCONF0	(*(volatile unsigned int *)0x80000180)
#define		MEMCONF1	(*(volatile unsigned int *)0x800001c0)

#define		MEM_CLKEN	(*(volatile unsigned char *)0x80)
#define		MEM_SQAEN	(*(volatile unsigned char *)0x40)
#define		MEM_WAIT_MAX	(*(volatile unsigned char *)0x00)
#define		MEM_BUS_8	(*(volatile unsigned char *)0x02)
#define		MEM_BUS_16	(*(volatile unsigned char *)0x01)
#define		MEM_BUS_32	(*(volatile unsigned char *)0x00)

// LED FLASH register
#define		LEDFLASH	(*(volatile unsigned int *)0x800022c0)

// SYSTEM CONTROL registers
#define		SYSCON1		(*(volatile unsigned int *)0x80000100)
#define		SYSCON2		(*(volatile unsigned int *)0x80001100)
#define		SYSCON3		(*(volatile unsigned int *)0x80002200)

// INTTRUPT STATUS & MASK REGISTERS
#define		INTSR1		(*(volatile unsigned int *)0x80000240)
#define		INTMR1		(*(volatile unsigned int *)0x80000280)

#define		INTSR2		(*(volatile unsigned int *)0x80001240)
#define		INTMR2		(*(volatile unsigned int *)0x80001280)

#endif /*ep7312_h*/