?? wdt841.lst
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A51 MACRO ASSEMBLER WDT841 17/10/03 16:25:07 PAGE 1
DOS MACRO ASSEMBLER A51 V5.50
OBJECT MODULE PLACED IN WDT841.OBJ
ASSEMBLER INVOKED BY: C:\ADUC\BIN\A51.EXE WDT841.A51 DB EP
LOC OBJ LINE SOURCE
1 ;File: Wdt841.asm
2 ;Author: Eckart Hartmann Date:15/10/2003
3 ;Description of Software: Demonstrates Watchdog timer functions.
4 ;Development progress: Wdt834.df
5 ;
6 extrn CODE (_WdtCfg) ;<A HREF="/mcc/softw/841/wdt/Wdt841Cfg.html">_WdtCfg</A> in
ADuC834.lib
7 extrn CODE (_WdtKk) ;<A HREF="/mcc/softw/841/wdt/Wdt841Kk.html">_WdtKk</A>)
8 extrn CODE (_PllDly) ;<A HREF="/mcc/softw/841/pll/Pll841Dly.html">_PllDly</A>)
9
10 NAME WDT834
11 $NOMOD51
12 $IC(..\kei841.inc) ;<A HREF="/mcc/softw/841/Kei841Inc.html">Parameter passing
registers for Keil</A>.
=1 13 ;Functions: Keil specific definitions.
=1 14 ;File: Keil841.inc
=1 15 ;Author: Eckart Hartmann Date:16/10/2003
=1 16 ;Description of Software: None.
=1 17 ;Development progress: None.
=1 18 ;
=1 19 ;Interface Signals:
=1 20 ;==================
=1 21 ;Naming scheme:
=1 22 ; c = 1 byte, i = 2 byte, l = 4 byte, p = 3 byte pointer.
=1 23 ; First digit = type of variable.
=1 24 ; Second digit = P.
=1 25 ; Third digit = parameter number.
=1 26 ; Fourth digit = byte of parameter.
=1 27 ; Fifth digit = if any then type of first parameter.
=1 28 ; Sixth digit = if any then type of second parameter.
=1 29 ;
REG =1 30 cP1l equ r7 ;Byte parameter1 and return value.
REG =1 31 iP1l equ r7 ;Integer parameter1 and return value low byte.
REG =1 32 iP1h equ r6 ;Integer parameter1 and return value high byte.
REG =1 33 lP1l equ r7 ;Long parameter1 and return value low byte.
REG =1 34 lP1s equ r6 ;Long parameter1 and return value second byte.
REG =1 35 lP1t equ r5 ;Long parameter1 and return value third byte.
REG =1 36 lP1h equ r4 ;Long parameter1 and return value high byte.
REG =1 37 pP1t equ r3 ;Pointer parameter1 type byte.
REG =1 38 pP1h equ r2 ;Pointer parameter1 high byte.
REG =1 39 pP1l equ r1 ;Pointer parameter1 low byte.
=1 40
REG =1 41 cP2li equ r5 ;Byte parameter2 after integer.
REG =1 42 iP2li equ r5 ;Integer parameter2 low byte after integer.
REG =1 43 iP2hi equ r4 ;Integer parameter2 high byte after integer.
REG =1 44 lP2li equ r7 ;Long parameter2 low byte after integer.
REG =1 45 lP2si equ r6 ;Long parameter2 second byte after integer.
REG =1 46 lP2ti equ r5 ;Long parameter2 third byte after integer.
REG =1 47 lP2hi equ r4 ;Long parameter2 high byte after integer.
REG =1 48 pP2ti equ r3 ;Pointer parameter2 type byte after integer.
REG =1 49 pP2hi equ r2 ;Pointer parameter2 high byte after integer.
REG =1 50 pP2li equ r1 ;Pointer parameter2 low byte after integer.
REG =1 51 cP2lc equ r5 ;Byte parameter2 after byte.
REG =1 52 iP2lc equ r5 ;Integer parameter2 low byte after byte.
REG =1 53 iP2hc equ r4 ;Integer parameter2 high byte after byte.
REG =1 54 lP2lc equ r7 ;Long parameter2 low byte after byte.
REG =1 55 lP2sc equ r6 ;Long parameter2 second byte after byte.
REG =1 56 lP2tc equ r5 ;Long parameter2 third byte after byte.
A51 MACRO ASSEMBLER WDT841 17/10/03 16:25:07 PAGE 2
REG =1 57 lP2hc equ r4 ;Long parameter2 high byte after byte.
REG =1 58 pP2tc equ r3 ;Pointer parameter2 type byte after byte.
REG =1 59 pP2hc equ r2 ;Pointer parameter2 high byte after byte.
REG =1 60 pP2lc equ r1 ;Pointer parameter2 low byte after byte.
REG =1 61 cP2lp equ r5 ;Byte parameter2 after pointer.
REG =1 62 iP2lp equ r5 ;Integer parameter2 low byte after pointer.
REG =1 63 iP2hp equ r4 ;Integer parameter2 high byte after pointer.
REG =1 64 lP2lp equ r7 ;Long parameter2 low byte after pointer.
REG =1 65 lP2sp equ r6 ;Long parameter2 second byte after pointer.
REG =1 66 lP2tp equ r5 ;Long parameter2 third byte after pointer.
REG =1 67 lP2hp equ r4 ;Long parameter2 high byte after pointer.
=1 68
REG =1 69 cP3lii equ r3 ;Byte parameter3 after integer and integer.
REG =1 70 iP3lii equ r3 ;Integer parameter3 low byte after integer and integer.
REG =1 71 iP3hii equ r2 ;Integer parameter3 high byte after integer and integer.
REG =1 72 pP3tii equ r3 ;Pointer parameter3 type byte after integer and integer.
REG =1 73 pP3hii equ r2 ;Pointer parameter3 high byte after integer and integer.
REG =1 74 pP3lii equ r1 ;Pointer parameter3 low byte after integer and integer.
REG =1 75 cP3lic equ r3 ;Byte parameter3 after integer and byte.
REG =1 76 iP3lic equ r3 ;Integer parameter3 low byte after integer and byte.
REG =1 77 iP3hic equ r2 ;Integer parameter3 high byte after integer and byte.
REG =1 78 pP3tic equ r3 ;Pointer parameter3 type byte after integer and byte.
REG =1 79 pP3hic equ r2 ;Pointer parameter3 high byte after integer and byte.
REG =1 80 pP3lic equ r1 ;Pointer parameter3 low byte after integer and byte.
REG =1 81 cP3lci equ r3 ;Byte parameter3 after integer and integer.
REG =1 82 iP3lci equ r3 ;Integer parameter3 low byte after byte and integer.
REG =1 83 iP3hci equ r2 ;Integer parameter3 high byte after byte and integer.
REG =1 84 pP3tci equ r3 ;Pointer parameter3 type byte after byte and integer.
REG =1 85 pP3hci equ r2 ;Pointer parameter3 high byte after byte and integer.
REG =1 86 pP3lci equ r1 ;Pointer parameter3 low byte after byte and integer.
REG =1 87 cP3lcc equ r3 ;Byte parameter3 after integer and integer.
REG =1 88 iP3lcc equ r3 ;Integer parameter3 low byte after byte and byte.
REG =1 89 iP3hcc equ r2 ;Integer parameter3 high byte after byte and byte.
REG =1 90 pP3tcc equ r3 ;Pointer parameter3 type byte after byte and byte.
REG =1 91 pP3hcc equ r2 ;Pointer parameter3 high byte after byte and byte.
REG =1 92 pP3lcc equ r1 ;Pointer parameter3 low byte after byte and byte.
=1 93 ;
=1 94 ;Keil841.inc end==============================================Keil841.inc end
=1 95 ;
=1 96
97 $IC(..\kei841.dat) ;<A HREF="/mcc/softw/841/Kei841Dat.html">SFR definition for
Keil</A>.
=1 98 ;File kei841.dat
=1 99 ;SFR definitions for ADuC841 Assebler files.
=1 100 ;ADuC841 Apps, Analog Devices Inc.
=1 101 $NOMOD51
0084 =1 102 DPP DATA 084H ;DATA POINTER - PAGE BYTE
009D =1 103 T3FD DATA 09DH ;Serial baudrate fraction
009E =1 104 T3CON DATA 09EH ;Seral baudrate tap
00A1 =1 105 TIMECON DATA 0A1H ;TIME COUNTER CONTROL REGISTER
00A2 =1 106 HTHSEC DATA 0A2H ;1/128 OF A SECOND COUNTER
00A3 =1 107 SEC DATA 0A3H ;SECONDS COUNTER
00A4 =1 108 MIN DATA 0A4H ;MINUTES COUNTER
00A5 =1 109 HOUR DATA 0A5H ;HOURS COUNTER
00A6 =1 110 INTVAL DATA 0A6H ;TIMER INTERVAL
00A7 =1 111 DPCON DATA 0A7H ;Data Pointer control
00A9 =1 112 IEIP2 DATA 0A9H ;INTERRUPT ENABLE 2
00AE =1 113 PWMCON DATA 0AEH ;PWM control
00AF =1 114 CFG841 DATA 0AFH ;Configure ADuC841.
00B1 =1 115 PWM0L DATA 0B1H ;PWM width low
00B2 =1 116 PWM0H DATA 0B2H ;PWM width high
00B3 =1 117 PWM1L DATA 0B3H ;PWM cycle low
00B4 =1 118 PWM1H DATA 0B4H ;PWM cycle high
00B7 =1 119 SPH DATA 0B7H ;Stack pointer high
00B9 =1 120 ECON DATA 0B9H ;FLASH CONTROL
00BC =1 121 EDATA1 DATA 0BCH ;FLASH DATA1
A51 MACRO ASSEMBLER WDT841 17/10/03 16:25:07 PAGE 3
00BD =1 122 EDATA2 DATA 0BDH ;FLASH DATA2
00BE =1 123 EDATA3 DATA 0BEH ;FLASH DATA3
00BF =1 124 EDATA4 DATA 0BFH ;FLASH DATA4
00C0 =1 125 WDCON DATA 0C0H ;WATCHDOG TIMER CONTROL
00C2 =1 126 CHIPID DATA 0C2H ;CHIP ID REGISTER
00C6 =1 127 EADRL DATA 0C6H ;EEPROM ADDRESS LOW
00C7 =1 128 EADRH DATA 0C7H ;EEPROM ADDRESS HIGH
00C8 =1 129 T2CON DATA 0C8H ;Timer 2 control.
00CA =1 130 RCAP2L DATA 0caH ;Reload/capture low byte.
00CB =1 131 RCAP2H DATA 0cbH ;Reload/capture high byte.
00CC =1 132 TL2 DATA 0CcH ;Timer 2 low byte.
00CD =1 133 TH2 DATA 0CdH ;Timer 2 high byte.
00D2 =1 134 DMAL DATA 0D2H ;DMA low,
00D3 =1 135 DMAH DATA 0D3H ; high
00D4 =1 136 DMAP DATA 0D4H ; and page.
00D7 =1 137 PLLCON DATA 0D7H ;CRYSTAL PLL CONTROL REGISTER
00D8 =1 138 ADCCON2 DATA 0D8H ;ADC control 2
00D9 =1 139 ADCDATAL DATA 0D9H ;ADC DATA REGISTER
00DA =1 140 ADCDATAH DATA 0DAH ;ADC DATA REGISTER
00DF =1 141 PSMCON DATA 0DFH ;POWER SUPPLY MONITOR
00EF =1 142 ADCCON1 DATA 0efH ;ADC control 1
00F1 =1 143 ADCOFSL DATA 0f1H ;ADC offset low
00F2 =1 144 ADCOFSH DATA 0f2H ; and high.
00F3 =1 145 ADCGAINL DATA 0f3H ;ADC gain low
00F4 =1 146 ADCGAINH DATA 0f4H ; and high.
00F5 =1 147 ADCCON3 DATA 0f5H ;ADC control 3.
00F7 =1 148 SPIDAT DATA 0F7H ;SPI DATA REGISTER
00F8 =1 149 SPICON DATA 0F8H ;SPI CONTROL REGISTER
00F9 =1 150 DAC0L DATA 0f9H ;DAC0 LOW BYTE
00FA =1 151 DAC0H DATA 0faH ;DAC0 HIGH BYTE
00FB =1 152 DAC1L DATA 0fbH ;DAC1 LOW BYTE
00FC =1 153 DAC1H DATA 0fcH ;DAC1 HIGH BYTE
00FD =1 154 DACCON DATA 0FDH ;DAC CONTROL REGISTER
=1 155 ;
=1 156 ;Bits.
=1 157 ;
00AE =1 158 EADC BIT 0AEH ;IE.6 - ENABLE ADC INTURRUPT
00BF =1 159 PSI BIT 0BFH ;IP.7 - SPI OR 2-WIRE SERIAL INTERFACE PRIORITY
00C0 =1 160 WDWR BIT 0C0H ;WDCON.0 - WATCHDOG WRITE ENABLE BIT
00C1 =1 161 WDE BIT 0C1H ;WDCON.1 - WATCHDOG ENABLE
00C2 =1 162 WDS BIT 0C2H ;WDCON.2 - WATCHDOG STATUS
00C3 =1 163 WDIR BIT 0C3H ;WDCON.3 - WATCHDOG INTERRUPT RESPONSE BIT
00C5 =1 164 PRE0 BIT 0C5H ;WDCON.4 - WATCHDOG TIMEOUT SELECTION BIT0
00C6 =1 165 PRE1 BIT 0C6H ;WDCON.5 - WATCHDOG TIMEOUT SELECTION BIT1
00C7 =1 166 PRE2 BIT 0C7H ;WDCON.6 - WATCHDOG TIMEOUT SELECTION BIT2
00C8 =1 167 PRE3 BIT 0C8H ;WDCON.7 - WATCHDOG TIMEOUT SELECTION BIT3
00F8 =1 168 SPR0 BIT 0F8H ;SPICON.0 - SPI BITRATE SELECT BIT0
00F9 =1 169 SPR1 BIT 0F9H ;SPICON.1 - SPI BITRATE SELECT BIT1
00FA =1 170 CPHA BIT 0FAH ;SPICON.2 - SPI CLOCK PHASE SELECT
00FB =1 171 CPOL BIT 0FBH ;SPICON.3 - SPI CLOCK POLARITY SELECT
00FC =1 172 SPIM BIT 0FCH ;SPICON.4 - SPI MASTER/SLAVE MODE SELECT
00FD =1 173 SPE BIT 0FDH ;SPICON.5 - SPI INTERFACE ENABLE
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