#ifndef _PLATFORM_H_
#define _PLATFORM_H_

//
// ************* OPTIONS **************
// #define MCLK (66000000)
//

#define MCLKM (66)              
#define PLLP  (3)

#define MCLK  (MCLKM * 1000000)
#define PLLON 1
#define PLLS  1
#define PLLM  ((MCLKM*2*(PLLP+2)/10)-8)

//             20,40,50,60,66,75
//         (PLL_M+8)*Fin      (PLL_M+8)*10Mhz
// MCLK=------------------- = ----------------
//      (PLL_P+2)*(2^PLL_S)        4*2


#define             WRBUFOPT (0x8)   //write_buf_on

#define SYSCFG_0KB  (0x0|WRBUFOPT)
#define SYSCFG_4KB  (0x2|WRBUFOPT)
#define SYSCFG_8KB  (0x6|WRBUFOPT)


#define CACHECFG    SYSCFG_8KB

#define Non_Cache_Start   (0x2000000)                          
#define Non_Cache_End     (0xc000000)                          
#define Non_Cache_Start1  (0x2000000)                          
#define Non_Cache_End1    (0xc000000)                          
#define Non_Cache_Start2  (0x2000000)                          
#define Non_Cache_End2    (0xc000000)                          


#define LEDPORT           ((volatile unsigned short *)(0x6080000))
#define NETBASE           ((volatile unsigned char  *)(0x60a0000))
#define CPLDREG1         ((volatile unsigned  char  *)(0xa200000))
#define CPLDREG2         ((volatile unsigned  char  *)(0xa210000))
#define CPLDREG3         ((volatile unsigned  char  *)(0xa220000))
#define CPLDREG4         ((volatile unsigned  char  *)(0xa230000))
#define CPLDREG5         ((volatile unsigned  char  *)(0xa240000))

#endif