/*-----------------------------------------------------------------------------//     $Date: 2004/07/31 23:46:47 $//     $RCSfile: boot.S,v $//-----------------------------------------------------------------------------//// Copyright (c) 2004 Xilinx, Inc.  All rights reserved. // // Xilinx, Inc. // XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A // COURTESY TO YOU.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS // ONE POSSIBLE   IMPLEMENTATION OF THIS FEATURE, APPLICATION OR // STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION // IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE // FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. // XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO // THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO // ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE // FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY // AND FITNESS FOR A PARTICULAR PURPOSE.////---------------------------------------------------------------------------*/	.file "boot.S"	.section .boot0,"ax"	.global _boot0_boot0:		lis 0, _start@h	ori 0, 0, _start@l	mtlr 0	blr	.section .boot,"ax"	.global _boot_boot:		b _boot0