@section ArchitecturesBFD keeps one atom in a BFD describing thearchitecture of the data attached to the BFD: a pointer to a@code{bfd_arch_info_type}.Pointers to structures can be requested independently of a BFDso that an architecture's information can be interrogatedwithout access to an open BFD.The architecture information is provided by each architecture package.The set of default architectures is selected by the macro@code{SELECT_ARCHITECTURES}.  This is normally set up in the@file{config/@var{target}.mt} file of your choice.  If the name is notdefined, then all the architectures supported are included.When BFD starts up, all the architectures are called with aninitialize method.  It is up to the architecture back end toinsert as many items into the list of architectures as it wants to;generally this would be one for each machine and one for thedefault case (an item with a machine field of 0).BFD's idea of an architecture is implemented in @file{archures.c}.@subsection bfd_architecture@strong{Description}@*This enum gives the object file's CPU architecture, in aglobal sense---i.e., what processor family does it belong to?Another field indicates which processor withinthe family is in use.  The machine gives a number whichdistinguishes different versions of the architecture,containing, for example, 2 and 3 for Intel i960 KA and i960 KB,and 68020 and 68030 for Motorola 68020 and 68030.@exampleenum bfd_architecture@{  bfd_arch_unknown,   /* File arch not known.  */  bfd_arch_obscure,   /* Arch known, not one of these.  */  bfd_arch_m68k,      /* Motorola 68xxx */#define bfd_mach_m68000 1#define bfd_mach_m68008 2#define bfd_mach_m68010 3#define bfd_mach_m68020 4#define bfd_mach_m68030 5#define bfd_mach_m68040 6#define bfd_mach_m68060 7#define bfd_mach_cpu32  8#define bfd_mach_mcf5200  9#define bfd_mach_mcf5206e 10#define bfd_mach_mcf5307  11#define bfd_mach_mcf5407  12  bfd_arch_vax,       /* DEC Vax */  bfd_arch_i960,      /* Intel 960 */    /* The order of the following is important.       lower number indicates a machine type that       only accepts a subset of the instructions       available to machines with higher numbers.       The exception is the "ca", which is       incompatible with all other machines except       "core".  */#define bfd_mach_i960_core      1#define bfd_mach_i960_ka_sa     2#define bfd_mach_i960_kb_sb     3#define bfd_mach_i960_mc        4#define bfd_mach_i960_xa        5#define bfd_mach_i960_ca        6#define bfd_mach_i960_jx        7#define bfd_mach_i960_hx        8  bfd_arch_or32,      /* OpenRISC 32 */  bfd_arch_a29k,      /* AMD 29000 */  bfd_arch_sparc,     /* SPARC */#define bfd_mach_sparc                 1/* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */#define bfd_mach_sparc_sparclet        2#define bfd_mach_sparc_sparclite       3#define bfd_mach_sparc_v8plus          4#define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */#define bfd_mach_sparc_sparclite_le    6#define bfd_mach_sparc_v9              7#define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */#define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */#define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  *//* Nonzero if MACH has the v9 instruction set.  */#define bfd_mach_sparc_v9_p(mach) \  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \   && (mach) != bfd_mach_sparc_sparclite_le)  bfd_arch_mips,      /* MIPS Rxxxx */#define bfd_mach_mips3000              3000#define bfd_mach_mips3900              3900#define bfd_mach_mips4000              4000#define bfd_mach_mips4010              4010#define bfd_mach_mips4100              4100#define bfd_mach_mips4111              4111#define bfd_mach_mips4120              4120#define bfd_mach_mips4300              4300#define bfd_mach_mips4400              4400#define bfd_mach_mips4600              4600#define bfd_mach_mips4650              4650#define bfd_mach_mips5000              5000#define bfd_mach_mips5400              5400#define bfd_mach_mips5500              5500#define bfd_mach_mips6000              6000#define bfd_mach_mips8000              8000#define bfd_mach_mips10000             10000#define bfd_mach_mips12000             12000#define bfd_mach_mips16                16#define bfd_mach_mips5                 5#define bfd_mach_mips_sb1              12310201 /* octal 'SB', 01 */#define bfd_mach_mipsisa32             32#define bfd_mach_mipsisa32r2           33#define bfd_mach_mipsisa64             64  bfd_arch_i386,      /* Intel 386 */#define bfd_mach_i386_i386 1#define bfd_mach_i386_i8086 2#define bfd_mach_i386_i386_intel_syntax 3#define bfd_mach_x86_64 64#define bfd_mach_x86_64_intel_syntax 65  bfd_arch_we32k,     /* AT&T WE32xxx */  bfd_arch_tahoe,     /* CCI/Harris Tahoe */  bfd_arch_i860,      /* Intel 860 */  bfd_arch_i370,      /* IBM 360/370 Mainframes */  bfd_arch_romp,      /* IBM ROMP PC/RT */  bfd_arch_alliant,   /* Alliant */  bfd_arch_convex,    /* Convex */  bfd_arch_m88k,      /* Motorola 88xxx */  bfd_arch_m98k,      /* Motorola 98xxx */  bfd_arch_pyramid,   /* Pyramid Technology */  bfd_arch_h8300,     /* Renesas H8/300 (formerly Hitachi H8/300) */#define bfd_mach_h8300    1#define bfd_mach_h8300h   2#define bfd_mach_h8300s   3#define bfd_mach_h8300hn  4#define bfd_mach_h8300sn  5#define bfd_mach_h8300sx  6#define bfd_mach_h8300sxn 7  bfd_arch_pdp11,     /* DEC PDP-11 */  bfd_arch_powerpc,   /* PowerPC */#define bfd_mach_ppc           32#define bfd_mach_ppc64         64#define bfd_mach_ppc_403       403#define bfd_mach_ppc_403gc     4030#define bfd_mach_ppc_505       505#define bfd_mach_ppc_601       601#define bfd_mach_ppc_602       602#define bfd_mach_ppc_603       603#define bfd_mach_ppc_ec603e    6031#define bfd_mach_ppc_604       604#define bfd_mach_ppc_620       620#define bfd_mach_ppc_630       630#define bfd_mach_ppc_750       750#define bfd_mach_ppc_860       860#define bfd_mach_ppc_a35       35#define bfd_mach_ppc_rs64ii    642#define bfd_mach_ppc_rs64iii   643#define bfd_mach_ppc_7400      7400#define bfd_mach_ppc_e500      500  bfd_arch_rs6000,    /* IBM RS/6000 */#define bfd_mach_rs6k          6000#define bfd_mach_rs6k_rs1      6001#define bfd_mach_rs6k_rsc      6003#define bfd_mach_rs6k_rs2      6002  bfd_arch_hppa,      /* HP PA RISC */  bfd_arch_d10v,      /* Mitsubishi D10V */#define bfd_mach_d10v          1#define bfd_mach_d10v_ts2      2#define bfd_mach_d10v_ts3      3  bfd_arch_d30v,      /* Mitsubishi D30V */  bfd_arch_dlx,       /* DLX */  bfd_arch_m68hc11,   /* Motorola 68HC11 */  bfd_arch_m68hc12,   /* Motorola 68HC12 */#define bfd_mach_m6812_default 0#define bfd_mach_m6812         1#define bfd_mach_m6812s        2  bfd_arch_z8k,       /* Zilog Z8000 */#define bfd_mach_z8001         1#define bfd_mach_z8002         2  bfd_arch_h8500,     /* Renesas H8/500 (formerly Hitachi H8/500) */  bfd_arch_sh,        /* Renesas / SuperH SH (formerly Hitachi SH) */#define bfd_mach_sh            1#define bfd_mach_sh2        0x20#define bfd_mach_sh_dsp     0x2d#define bfd_mach_sh2e       0x2e#define bfd_mach_sh3        0x30#define bfd_mach_sh3_dsp    0x3d#define bfd_mach_sh3e       0x3e#define bfd_mach_sh4        0x40#define bfd_mach_sh5        0x50  bfd_arch_alpha,     /* Dec Alpha */#define bfd_mach_alpha_ev4  0x10#define bfd_mach_alpha_ev5  0x20#define bfd_mach_alpha_ev6  0x30  bfd_arch_arm,       /* Advanced Risc Machines ARM.  */#define bfd_mach_arm_unknown   0#define bfd_mach_arm_2         1#define bfd_mach_arm_2a        2#define bfd_mach_arm_3         3#define bfd_mach_arm_3M        4#define bfd_mach_arm_4         5#define bfd_mach_arm_4T        6#define bfd_mach_arm_5         7#define bfd_mach_arm_5T        8#define bfd_mach_arm_5TE       9#define bfd_mach_arm_XScale    10#define bfd_mach_arm_ep9312    11#define bfd_mach_arm_iWMMXt    12  bfd_arch_ns32k,     /* National Semiconductors ns32000 */  bfd_arch_w65,       /* WDC 65816 */  bfd_arch_tic30,     /* Texas Instruments TMS320C30 */  bfd_arch_tic4x,     /* Texas Instruments TMS320C3X/4X */#define bfd_mach_tic3x         30#define bfd_mach_tic4x         40  bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */  bfd_arch_tic80,     /* TI TMS320c80 (MVP) */  bfd_arch_v850,      /* NEC V850 */#define bfd_mach_v850          1#define bfd_mach_v850e         'E'  bfd_arch_arc,       /* ARC Cores */#define bfd_mach_arc_5         5#define bfd_mach_arc_6         6#define bfd_mach_arc_7         7#define bfd_mach_arc_8         8  bfd_arch_m32r,      /* Renesas M32R (formerly Mitsubishi M32R/D) */#define bfd_mach_m32r          1 /* For backwards compatibility.  */#define bfd_mach_m32rx         'x'  bfd_arch_mn10200,   /* Matsushita MN10200 */  bfd_arch_mn10300,   /* Matsushita MN10300 */#define bfd_mach_mn10300               300#define bfd_mach_am33          330  bfd_arch_fr30,#define bfd_mach_fr30          0x46523330  bfd_arch_frv,#define bfd_mach_frv           1#define bfd_mach_frvsimple     2#define bfd_mach_fr300         300#define bfd_mach_fr400         400#define bfd_mach_frvtomcat     499     /* fr500 prototype */#define bfd_mach_fr500         500  bfd_arch_mcore,  bfd_arch_ia64,      /* HP/Intel ia64 */#define bfd_mach_ia64_elf64    64#define bfd_mach_ia64_elf32    32  bfd_arch_ip2k,      /* Ubicom IP2K microcontrollers. */#define bfd_mach_ip2022        1#define bfd_mach_ip2022ext     2 bfd_arch_iq2000,     /* Vitesse IQ2000.  */#define bfd_mach_iq2000        1#define bfd_mach_iq10          2  bfd_arch_pj,  bfd_arch_avr,       /* Atmel AVR microcontrollers.  */#define bfd_mach_avr1          1#define bfd_mach_avr2          2#define bfd_mach_avr3          3#define bfd_mach_avr4          4#define bfd_mach_avr5          5  bfd_arch_cris,      /* Axis CRIS */  bfd_arch_s390,      /* IBM s390 */#define bfd_mach_s390_31       31#define bfd_mach_s390_64       64  bfd_arch_openrisc,  /* OpenRISC */