?? drvpwm.i
字號(hào):
register uint32_t __regControl __asm("control");
return(__regControl);
}
static __inline void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __asm("control");
__regControl = control;
}
#line 770 "..\\Lib\\CMSIS\\CM0\\CoreSupport\\core_cm0.h"
static __inline void NVIC_EnableIRQ(IRQn_Type IRQn)
{
((NVIC_Type *) ((0xE000E000) + 0x0100))->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
static __inline void NVIC_DisableIRQ(IRQn_Type IRQn)
{
((NVIC_Type *) ((0xE000E000) + 0x0100))->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
static __inline uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t) ((((NVIC_Type *) ((0xE000E000) + 0x0100))->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
}
static __inline void NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
((NVIC_Type *) ((0xE000E000) + 0x0100))->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
static __inline void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
((NVIC_Type *) ((0xE000E000) + 0x0100))->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
}
static __inline void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if(IRQn < 0) {
((SCB_Type *) ((0xE000E000) + 0x0D00))->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] = (((SCB_Type *) ((0xE000E000) + 0x0D00))->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] & ~(0xFF << ( (((uint32_t)(IRQn) ) & 0x03) * 8 ))) |
(((priority << (8 - 2)) & 0xFF) << ( (((uint32_t)(IRQn) ) & 0x03) * 8 )); }
else {
((NVIC_Type *) ((0xE000E000) + 0x0100))->IPR[( ((uint32_t)(IRQn) >> 2) )] = (((NVIC_Type *) ((0xE000E000) + 0x0100))->IPR[( ((uint32_t)(IRQn) >> 2) )] & ~(0xFF << ( (((uint32_t)(IRQn) ) & 0x03) * 8 ))) |
(((priority << (8 - 2)) & 0xFF) << ( (((uint32_t)(IRQn) ) & 0x03) * 8 )); }
}
static __inline uint32_t NVIC_GetPriority(IRQn_Type IRQn)
{
if(IRQn < 0) {
return((uint32_t)((((SCB_Type *) ((0xE000E000) + 0x0D00))->SHP[( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )] >> ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) ) >> (8 - 2))); }
else {
return((uint32_t)((((NVIC_Type *) ((0xE000E000) + 0x0100))->IPR[( ((uint32_t)(IRQn) >> 2) )] >> ( (((uint32_t)(IRQn) ) & 0x03) * 8 ) ) >> (8 - 2))); }
}
static __inline uint32_t SysTick_Config(uint32_t ticks)
{
if (ticks > (0xFFFFFFul << 0)) return (1);
((SysTick_Type *) ((0xE000E000) + 0x0010))->LOAD = (ticks & (0xFFFFFFul << 0)) - 1;
NVIC_SetPriority (SysTick_IRQn, (1<<2) - 1);
((SysTick_Type *) ((0xE000E000) + 0x0010))->VAL = 0;
((SysTick_Type *) ((0xE000E000) + 0x0010))->CTRL = (1ul << 2) |
(1ul << 1) |
(1ul << 0);
return (0);
}
static __inline void NVIC_SystemReset(void)
{
((SCB_Type *) ((0xE000E000) + 0x0D00))->AIRCR = ((0x5FA << 16) |
(1ul << 2));
__dsb(0);
while(1);
}
#line 75 "..\\Lib\\CMSIS\\CM0\\DeviceSupport\\Nuvoton\\NUC1xx\\NUC1xx.h"
#line 1 "..\\Lib\\CMSIS\\CM0\\DeviceSupport\\Nuvoton\\NUC1xx\\system_NUC1xx.h"
extern uint32_t SystemCoreClock;
extern uint32_t CyclesPerUs;
extern void SystemInit(void);
extern void SystemCoreClockUpdate (void);
#line 76 "..\\Lib\\CMSIS\\CM0\\DeviceSupport\\Nuvoton\\NUC1xx\\NUC1xx.h"
#line 1 "..\\Lib\\Include\\System\\SysInfra.h"
#line 1 "..\\Lib\\Include\\System\\ModuleID.h"
typedef enum
{
MODULE_ID_DRVPROTECT = 0,
MODULE_ID_DRVADC = 2,
MODULE_ID_DRVAIC = 4,
MODULE_ID_DRVAPU = 6,
MODULE_ID_DRVAUDIOADC = 8,
MODULE_ID_DRVCACHE = 10,
MODULE_ID_DRVCAN = 11,
MODULE_ID_DRVEBI = 12,
MODULE_ID_DRVEDMA = 13,
MODULE_ID_DRVGDMA = 14,
MODULE_ID_DRVFSC = 15,
MODULE_ID_DRVGE = 16,
MODULE_ID_DRVFMC = 17,
MODULE_ID_DRVGPIO = 18,
MODULE_ID_DRVGPU = 20,
MODULE_ID_DRVI2C = 22,
MODULE_ID_DRVI2S = 24,
MODULE_ID_DRVI2SM = 26,
MODULE_ID_DRVMPU = 28,
MODULE_ID_DRVNAND = 30,
MODULE_ID_DRVNOR = 32,
MODULE_ID_DRVPDMA = 33,
MODULE_ID_DRVPWM = 34,
MODULE_ID_DRVPS2 = 35,
MODULE_ID_DRVRTC = 36,
MODULE_ID_DRVSDCARD = 38,
MODULE_ID_DRVSIO = 39,
MODULE_ID_DRVSPI = 40,
MODULE_ID_DRVSPIMS = 41,
MODULE_ID_DRVSPIFLASH = 42,
MODULE_ID_DRVSPIM = 43,
MODULE_ID_DRVSYS = 44,
MODULE_ID_DRVSPU = 45,
MODULE_ID_DRVTIMER = 46,
MODULE_ID_DRVUART = 48,
MODULE_ID_DRVUSB = 50,
MODULE_ID_DRVUSBH = 52,
MODULE_ID_DRVVDMA = 54,
MODULE_ID_DRVVIDEOIN = 56,
MODULE_ID_DRVVPOST = 58,
MODULE_ID_DRVVRAM = 60,
MODULE_ID_DRVW55U02 = 62,
MODULE_ID_DRVI2CH = 64,
MODULE_ID_DRVWDT = 66,
MODULE_ID_DRVJPEG = 68,
MODULE_ID_DRVZEROG = 70,
MODULE_ID_DRVSI2C = 71,
MODULE_ID_AEC = 81,
MODULE_ID_BEATDET = 82,
MODULE_ID_SNDEFF = 83,
MODULE_ID_AUDIOSYN = 84,
MODULE_ID_G726ADPCM = 85,
MODULE_ID_IMAADPCM = 86,
MODULE_ID_MP3DEC = 88,
MODULE_ID_PITCHCHANGE = 90,
MODULE_ID_WAVFILEUTIL = 92,
MODULE_ID_WMADEC = 96,
MODULE_ID_WMADECDRM = 98,
MODULE_ID_AUDIOCTRL = 100,
MODULE_ID_EQ = 106,
MODULE_ID_OGGDEC = 110,
MODULE_ID_MP3ENC = 112,
MODULE_ID_UADEC = 114,
MODULE_ID_ULSPEECHDEC = 115,
MODULE_ID_USPEECHDEC = 116,
MODULE_ID_SPEECHRECOG = 118,
MODULE_ID_FS = 120,
MODULE_ID_FL = 128,
MODULE_ID_KEYPAD = 130,
MODULE_ID_LWIP = 132,
MODULE_ID_WLANMGR = 134,
MODULE_ID_HTTPD = 136,
MODULE_ID_VIRTUALCOM = 139,
MODULE_ID_GFXRESLDR = 140,
MODULE_ID_GFXLIB = 141,
MODULE_ID_IMGPROC = 142,
MODULE_ID_JPEG = 144,
MODULE_ID_PNGDEC = 146,
MODULE_ID_BARCODE2D = 148,
MODULE_ID_PTNRECOG = 150,
MODULE_ID_MOTIONDET = 152,
MODULE_ID_STORIF = 160,
MODULE_ID_SDCARD = 161,
MODULE_ID_SYSNAND = 162,
MODULE_ID_SPIFLASH = 163,
MODULE_ID_WTRIF = 164,
MODULE_ID_NORFLASH = 165,
MODULE_ID_SYSNANDLITE = 166,
MODULE_ID_INTMGR = 180,
MODULE_ID_BLKLDR = 181,
MODULE_ID_MEMMGR = 182,
MODULE_ID_EVTMGR = 183,
MODULE_ID_PROF = 184,
MODULE_ID_PROGLDR = 186,
MODULE_ID_SYSINFRA = 188,
MODULE_ID_TIMERCTRL = 190,
MODULE_ID_TIMEUTIL = 192,
MODULE_ID_CONPROGLDR = 194,
MODULE_ID_USBCOREH = 78,
MODULE_ID_HID = 220,
MODULE_ID_MASSSTOR = 222,
MODULE_ID_MASSSTORHID = 224,
MODULE_ID_MASSSTORLITE = 226,
MODULE_ID_MTP = 230,
MODULE_ID_USBINFRA = 232,
MODULE_ID_UAC = 234,
MODULE_ID_UAVC = 236,
MODULE_ID_UVC = 238,
MODULE_ID_MASSSTORH = 252,
MODULE_ID_HIDH = 254,
MODULE_ID_VCOM = 253,
MODULE_ID_MSDRMPD = 228,
MODULE_ID_AVICODEC = 240,
MODULE_ID_MJPEG = 242,
MODULE_ID_WIVICORE = 244,
MODULE_ID_WIVI = 246,
MODULE_ID_AVCTRL = 248,
MODULE_ID_AVIUTIL = 250,
MODULE_ID_WTCHAN = 168,
MODULE_ID_WTCMDSERV = 170,
MODULE_ID_WTDISPLAY = 172,
MODULE_ID_WTMEDIA = 174,
MODULE_ID_WTSYS = 176,
MODULE_ID_WTTRANS = 178,
} E_SYSINFRA_MODULE_ID;
#line 15 "..\\Lib\\Include\\System\\SysInfra.h"
#line 16 "..\\Lib\\Include\\System\\SysInfra.h"
#line 17 "..\\Lib\\Include\\System\\SysInfra.h"
#line 77 "..\\Lib\\CMSIS\\CM0\\DeviceSupport\\Nuvoton\\NUC1xx\\NUC1xx.h"
#pragma anon_unions
typedef struct
{
volatile uint32_t PMD0:2;
volatile uint32_t PMD1:2;
volatile uint32_t PMD2:2;
volatile uint32_t PMD3:2;
volatile uint32_t PMD4:2;
volatile uint32_t PMD5:2;
volatile uint32_t PMD6:2;
volatile uint32_t PMD7:2;
volatile uint32_t PMD8:2;
volatile uint32_t PMD9:2;
volatile uint32_t PMD10:2;
volatile uint32_t PMD11:2;
volatile uint32_t PMD12:2;
volatile uint32_t PMD13:2;
volatile uint32_t PMD14:2;
volatile uint32_t PMD15:2;
} GPIO_PMD_T;
typedef volatile uint32_t GPIO_OFFD_T;
typedef volatile uint32_t GPIO_DOUT_T;
typedef volatile uint32_t GPIO_DMASK_T;
typedef volatile uint32_t GPIO_PIN_T;
typedef volatile uint32_t GPIO_DBEN_T;
typedef volatile uint32_t GPIO_IMD_T;
typedef volatile uint32_t GPIO_IEN_T;
typedef volatile uint32_t GPIO_ISRC_T;
typedef struct
{
union {
volatile uint32_t u32PMD;
struct {
volatile uint32_t PMD0:2;
volatile uint32_t PMD1:2;
volatile uint32_t PMD2:2;
volatile uint32_t PMD3:2;
volatile uint32_t PMD4:2;
volatile uint32_t PMD5:2;
volatile uint32_t PMD6:2;
volatile uint32_t PMD7:2;
volatile uint32_t PMD8:2;
volatile uint32_t PMD9:2;
volatile uint32_t PMD10:2;
volatile uint32_t PMD11:2;
volatile uint32_t PMD12:2;
volatile uint32_t PMD13:2;
volatile uint32_t PMD14:2;
volatile uint32_t PMD15:2;
} PMD;
};
union {
volatile uint32_t u32OFFD;
volatile uint32_t OFFD;
};
union {
volatile uint32_t u32DOUT;
volatile uint32_t DOUT;
};
union {
volatile uint32_t u32DMASK;
volatile uint32_t DMASK;
};
union {
volatile uint32_t u32PIN;
volatile uint32_t PIN;
};
union {
volatile uint32_t u32DBEN;
volatile uint32_t DBEN;
};
union {
volatile uint32_t u32IMD;
volatile uint32_t IMD;
};
union {
volatile uint32_t u32IEN;
volatile uint32_t IEN;
};
union {
volatile uint32_t u32ISRC;
volatile uint32_t ISRC;
};
} GPIO_T;
typedef struct
{
union {
volatile uint32_t u32DBNCECON;
struct {
volatile uint32_t DBCLKSEL:4;
volatile uint32_t DBCLKSRC:1;
volatile uint32_t ICLK_ON:1;
volatile const uint32_t RESERVE:26;
} DBNCECON;
};
} GPIO_DBNCECON_T;
typedef volatile uint32_t UART_DATA_T;
typedef struct
{
volatile uint32_t RDA_IEN:1;
volatile uint32_t THRE_IEN:1;
volatile uint32_t RLS_IEN:1;
volatile uint32_t MODEM_IEN:1;
volatile uint32_t RTO_IEN:1;
volatile uint32_t BUF_ERR_IEN:1;
volatile uint32_t WAKE_EN:1;
volatile const uint32_t RESERVE0:1;
volatile uint32_t LIN_RX_BRK_IEN:1;
volatile const uint32_t RESERVE1:2;
volatile uint32_t TIME_OUT_EN:1;
volatile uint32_t AUTO_RTS_EN:1;
volatile uint32_t AUTO_CTS_EN:1;
volatile uint32_t DMA_TX_EN:1;
volatile uint32_t DMA_RX_EN:1;
volatile const uint32_t RESERVE2:16;
} UART_IER_T;
typedef struct
{
volatile const uint32_t RESERVE0:1;
volatile uint32_t RFR:1;
volatile uint32_t TFR:1;
volatile const uint32_t RESERVE1:1;
volatile uint32_t RFITL:4;
volatile uint32_t RX_DIS:1;
volatile const uint32_t RESERVE2:7;
volatile uint32_t RTS_TRI_LEV:4;
volatile const uint32_t RESERVE3:12;
} UART_FCR_T;
typedef struct
{
volatile uint32_t WLS:2;
volatile uint32_t NSB:1;
volatile uint32_t PBE:1;
volatile uint32_t EPE:1;
volatile uint32_t SPE:1;
volatile uint32_t BCB:1;
volatile const uint32_t RESERVE:25;
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