#define INIT_STATE_MASK	(VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE)
#define INIT_STATE	(VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT)

/* these are also defined in equates.h */
/* we re-define them here so that users do not need our header file to build */
#define MAX_UNITS		4
#define PCI_VENDOR_ID		0x8086
#define PCI_DEVICE_ID		0x1229	/* 82559 (D101M or D101S) */
#define PCI_ER_DEVICE_ID	0x1209	/* 82559ER (D101ER) */
 
extern int eeE_board_pci_info[MAX_UNITS][3];
extern void *eeE_bdvect[];
extern int eeEboards;


/*******************************************************************************
*
* syseeVPciInit - prepare LAN adapter for eeV initialization
*
* This routine find out the PCI device, and map its memory and IO address.
* It must be done prior to initializing the eeV.  Also
* must be done prior to MMU initialization, usrMmuInit().
* Also sets number of boards in system (eeEboards)
*
* RETURNS: N/A
*/

void syseeVPciInit (void)
{
    char	irq;
    UINT32	membaseCsr;
    int		done = 0;
    int		count = 0;
    UINT16	data;
    int		bus, dev, func;

	
	/* Find the device and get bus, dev, func and figure out which device is first */
	func = 0;
	for ( bus = 0; bus < PCI_MAX_BUS; bus ++ )
	{
		for ( dev = 0; dev < PCI_MAX_DEV; dev++ )
		{
			pciConfigInWord (bus, dev, func, PCI_CFG_VENDOR_ID, &data);
			if (data == PCI_VENDOR_ID)
			{
				pciConfigInWord (bus, dev, func, PCI_CFG_DEVICE_ID, &data);
				if ((data == PCI_DEVICE_ID)||(data == PCI_ER_DEVICE_ID))
				{
				        /* get memory base address */
					pciConfigInLong (bus, dev, func, PCI_CFG_BASE_ADDRESS_0, &membaseCsr);
					membaseCsr   &= 0xFFFFFFF0;
	
					/* get the irq level */
					pciConfigInByte (bus, dev, func, PCI_CFG_DEV_INT_LINE, &irq);

					/* add the entry to sysPhysMemDesc[] */
					/* CHECK: this function only works for 1:1 mapping */
				        if (sysMmuMapAdd((void *)membaseCsr, (1024*4),
					                          INIT_STATE_MASK, INIT_STATE) == ERROR) {
						/* This error condition will be checked in the attach */
						eeE_board_pci_info[count][0] = -1;
					}
					else {

						/* This is the normal path of execution  */
						sysIntEnablePIC (irq);  
						eeE_board_pci_info[count][0] = bus;
					}

					eeE_board_pci_info[count][1] = dev;
					eeE_board_pci_info[count][2] = func;
					eeE_bdvect[count] = NULL;
					eeEboards++;
					if ((count++) == MAX_UNITS)
					{
						done = 1;
						break;
					}
				}
			}
		}
		if (done)
			break;
	}
				
}
void * eeV_PhysToVirt (UINT32 physaddr)
{
		/* This is where you add your translation function */
		return (void *)physaddr;
}

ulong_t eeV_VirtToPhys (void * virtaddr)
{
		/* This is where you add your translation function */
		return (ulong_t)virtaddr;
}