亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

? 歡迎來到蟲蟲下載站! | ?? 資源下載 ?? 資源專輯 ?? 關于我們
? 蟲蟲下載站

?? dec2155xcpci.c

?? VxWorks下 Cpv3060的BSP源代碼
?? C
?? 第 1 頁 / 共 4 頁
字號:
/* dec2155xCpci.c - DEC 2155X (Drawbridge) PCI-to-PCI bridge library *//* Copyright 1998-2000 Motorola, Inc. All Rights Reserved *//*modification history--------------------01f 03jan01,rhk  Adjust for MPC860 interrupt handler.01e,25apr00,srr  Updated for WRS coding standards.01d,06dec99,rhk  mask all of the Upper 32 Bits Downstream Memory 3 		 Setup register01c,29oct99,dmw  Used TRANSLATE macro for cPCI address.01b,20oct99,srr  Include hawkMpic.h only if INCLUDE_MPIC defined.01a,10jun99,rhv  Written (from version 01o of mcpn750/dec2155xCcpi.c).*//*DESCRIPTIONThe routines addressed here include:Initialization of 2155x chipBus interrupt functions:    - enable/disable Compact PCI interrupts    - enable/disable drawbridge internal interrupts    - install handlers for the drawbridge internal  interrupts    - generate Compact PCI bus interruptsMailbox functions:    - enable mailbox interruptsPortions of this code (dec2155xInit) must run before the local PCI busenumeration been performed. As such, the 2155x BAR registers have not beeninitialized and access must be performed though the local PCI configurationspace. This is done using the pciConfigxxxx calls (in pciConfigLib.c). Oncelocal PCI bus enumeration has completed, access to most 2155x registers willbe performed using the local PCI memory space and sysPcixxxx calls.*//* includes */#include "vxWorks.h"#include "config.h"#include "vxLib.h"#ifdef INCLUDE_MPIC#  include "hawkMpic.h"#else#  if (CPU==PPC860)#     include "ppc860Intr.h"#  else#     include "sl82565IntrCtl.h"#  endif  /* (CPU==PPC860) */#endif /* INCLUDE_MPIC */#include "intLib.h"#include "logLib.h"#include "dec2155xCpci.h"#include "pci.h"/* defines */#define DEC2155X_ENABLE_MEM_AND_IO (PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE)/* this section validates the upstream and downstream window parameters */#if (DEC2155X_CSR_AND_DS_MEM0_SIZE & (DEC2155X_CSR_AND_DS_MEM0_SIZE - 1))#    error DEC2155X_CSR_AND_DS_MEM0_SIZE is not a power of 2#else#    if (DEC2155X_CSR_AND_DS_MEM0_TRANS & (DEC2155X_CSR_AND_DS_MEM0_SIZE - 1))#        error DEC2155X_CSR_AND_DS_MEM0_TRANS is not a multiple of window size#    endif#    if (DEC2155X_CSR_AND_DS_MEM0_SIZE & DEC2155X_MEM_TB_RSV_MSK)#        error DEC2155X_CSR_AND_DS_MEM0_SIZE is less than 4KB in size#    endif#endif#if (DEC2155X_DS_IO_OR_MEM1_SIZE & (DEC2155X_DS_IO_OR_MEM1_SIZE - 1))#    error DEC2155X_DS_IO_OR_MEM1_SIZE is not a power of 2#else#    if (DEC2155X_DS_IO_OR_MEM1_TRANS & (DEC2155X_DS_IO_OR_MEM1_SIZE - 1))#        error DEC2155X_DS_IO_OR_MEM1_TRANS is not a multiple of window size#    endif#    if (DEC2155X_DS_IO_OR_MEM1_TYPE & PCI_BAR_SPACE_IO)#        if (DEC2155X_DS_IO_OR_MEM1_SIZE & DEC2155X_IO_OR_MEM_TB_RSV_MSK)#            error DEC2155X_DS_IO_OR_MEM1_SIZE is less than 64 bytes#        endif#    else#        if (DEC2155X_DS_IO_OR_MEM1_SIZE & DEC2155X_MEM_TB_RSV_MSK)#            error DEC2155X_DS_IO_OR_MEM1_SIZE is less than 4KB#        endif#    endif        #endif#if (DEC2155X_DS_MEM2_SIZE & (DEC2155X_DS_MEM2_SIZE - 1))#    error DEC2155X_DS_MEM2_SIZE is not a power of 2#else#    if (DEC2155X_DS_MEM2_TRANS & (DEC2155X_DS_MEM2_SIZE - 1))#        error DEC2155X_DS_MEM2_TRANS is not a multiple of window size#    endif#    if (DEC2155X_DS_MEM2_SIZE & DEC2155X_MEM_TB_RSV_MSK)#        error DEC2155X_DS_MEM2_SIZE is less than 4KB in size#    endif#endif#if (DEC2155X_DS_MEM3_SIZE & (DEC2155X_DS_MEM3_SIZE - 1))#    error DEC2155X_DS_MEM3_SIZE is not a power of 2#else#    if (DEC2155X_DS_MEM3_TRANS & (DEC2155X_DS_MEM3_SIZE - 1))#        error DEC2155X_DS_MEM3_TRANS is not a multiple of window size#    endif#    if (DEC2155X_DS_MEM3_SIZE & DEC2155X_MEM_TB_RSV_MSK)#        error DEC2155X_DS_MEM3_SIZE is less than 4KB in size#    endif#endif#if (DEC2155X_US_IO_OR_MEM0_SIZE & (DEC2155X_US_IO_OR_MEM0_SIZE - 1))#    error DEC2155X_US_IO_OR_MEM0_SIZE is not a power of 2#else#    if (DEC2155X_US_IO_OR_MEM0_TRANS & (DEC2155X_US_IO_OR_MEM0_SIZE - 1))#        error DEC2155X_US_IO_OR_MEM0_TRANS is not a multiple of window size#    endif#    if (DEC2155X_US_IO_OR_MEM0_TYPE & PCI_BAR_SPACE_IO)#        if (DEC2155X_US_IO_OR_MEM0_SIZE & DEC2155X_IO_OR_MEM_TB_RSV_MSK)#            error DEC2155X_US_IO_OR_MEM0_SIZE is less than 64 bytes#        endif#    else#        if (DEC2155X_US_IO_OR_MEM0_SIZE & DEC2155X_MEM_TB_RSV_MSK)#            error DEC2155X_US_IO_OR_MEM0_SIZE is less than 4KB#        endif#    endif        #endif#if (DEC2155X_US_MEM1_SIZE & (DEC2155X_US_MEM1_SIZE - 1))#    error DEC2155X_US_MEM1_SIZE is not a power of 2#else#    if (DEC2155X_US_MEM1_TRANS & (DEC2155X_US_MEM1_SIZE - 1))#        error DEC2155X_US_MEM1_TRANS is not a multiple of window size#    endif#    if (DEC2155X_US_MEM1_SIZE & DEC2155X_MEM_TB_RSV_MSK)#        error DEC2155X_US_MEM1_SIZE is less than 4KB in size#    endif#endif/* create window setup values */#if (DEC2155X_CSR_AND_DS_MEM0_SIZE)#   define DEC2155X_CSR_AND_DS_MEM0_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE        | \           ~(DEC2155X_CSR_AND_DS_MEM0_SIZE - 1) | \           DEC2155X_CSR_AND_DS_MEM0_TYPE)#else#   define DEC2155X_CSR_AND_DS_MEM0_SETUP 0x00000000#endif#if (DEC2155X_DS_IO_OR_MEM1_SIZE)#   define DEC2155X_DS_IO_OR_MEM1_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE      | \           ~(DEC2155X_DS_IO_OR_MEM1_SIZE - 1) | \           DEC2155X_DS_IO_OR_MEM1_TYPE)#else#   define DEC2155X_DS_IO_OR_MEM1_SETUP 0x00000000#endif#if (DEC2155X_DS_MEM2_SIZE)#   define DEC2155X_DS_MEM2_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE | \           ~(DEC2155X_DS_MEM2_SIZE - 1)  | \           DEC2155X_DS_MEM2_TYPE)#else#   define DEC2155X_DS_MEM2_SETUP 0x00000000#endif#if (DEC2155X_DS_MEM3_SIZE)#   define DEC2155X_DS_MEM3_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE | \           ~(DEC2155X_DS_MEM3_SIZE - 1)  | \           DEC2155X_DS_MEM3_TYPE)#else#   define DEC2155X_DS_MEM3_SETUP 0x00000000#endif#if (DEC2155X_US_IO_OR_MEM0_SIZE)#   define DEC2155X_US_IO_OR_MEM0_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE      | \           ~(DEC2155X_US_IO_OR_MEM0_SIZE - 1) | \           DEC2155X_US_IO_OR_MEM0_TYPE)#else#   define DEC2155X_US_IO_OR_MEM0_SETUP 0x00000000#endif#if (DEC2155X_US_MEM1_SIZE)#   define DEC2155X_US_MEM1_SETUP ( \           DEC2155X_SETUP_REG_BAR_ENABLE | \           ~(DEC2155X_US_MEM1_SIZE - 1)  | \           DEC2155X_US_MEM1_TYPE)#else#   define DEC2155X_US_MEM1_SETUP 0x00000000#endif#define DEC2155X_UPR32_DS_MEM3_SETUP 0x00000000#define DEC2155X_CFG_CHP_STS_ERR_CLR (DEC2155X_CHPSR_US_DLYD_TRNS_MSTR_TO | \                                      DEC2155X_CHPSR_US_DLYD_RD_TRNS_TO   | \                                      DEC2155X_CHPSR_US_DLYD_WRT_TRNS_TO  | \                                      DEC2155X_CHPSR_US_PSTD_WRT_DATA_DISC)#define DEC2155X_CFG_STS_ERR_CLR (DEC2155X_CFG_STS_DATA_PAR_ERR_DET | \                                  DEC2155X_CFG_STS_SIG_TGT_ABT      | \                                  DEC2155X_CFG_STS_RCVD_TGT_ABT     | \                                  DEC2155X_CFG_STS_RCVD_MSTR_ABT    | \                                  DEC2155X_CFG_STS_SIG_SYS_ERR      | \                                  DEC2155X_CFG_STS_DET_PAR_ERR)/* structures */typedef struct windowParameters    {    UINT32 windowType; /* mem or i/o */    UINT32 origBase;   /* as seen from originating bus */    UINT32 trgtBase;   /* as seen from target bus */    UINT32 trgtLimit;  /* end of window + 1 */    } WINDOW_PARAMETERS;typedef struct windowOffsets    {    UINT32 bar;        /* offset to base address register */    UINT32 trans;      /* offset to translation or opposite base address reg */    UINT32 setup;      /* offset to setup reg or pseudo-register contents */    UINT32 unuseable;  /* unuseable space at start of window */    } WINDOW_OFFSETS;/* * NOTE: The Primary CSR I/O BAR, Secondary CSR Memory BAR and the Secondary * CSR I/O BAR do not have corresponding setup registers in the Dec2155x. * Also note that the first 4KB of the window mapped by the * Primary CSR and Downstream Memory 0 BAR actually references the * Dec2155x CSR set. To accommodate these hardware-defined windows, * a number of simulated setup registers are present in the offset tables * below. They can be recognized by the fact that their values are far * to large to be true register offsets. This fact is ensured because * an enabled setup register will always have bit 31 set. When the  * window mapping code encounters one of large offsets, it simply uses * the emulated setup value from the table as if it had been read from * the Dec2155x itself. Please bear this in mind should any modifications * to the table be required. * * Also note that there are two table entries for the Primary CSR and * Downstream Memory 0 window. This apparent double mapping is done to * simplify the translation of addresses which lie within this window. * Addresses in the CSR register set (doorbell interrupts, doorbell * interrupt masks, etc.) are translated by looking up the address of the * register when viewed by the opposite processor while the memory area * above the CSR register space is translated using the downstream CSR * and Memory 0 translated base register. Even though these two windows * overlap for the first 4KB (the size of the CSR register image), no * conflict is created because the translation routines always check the * CSR space first. If the address resides in the CSR space, the search * will never advance to the memory portion of the window and only one * translated value is possible. If the address resides above the CSR * space, the first mapping window will lie below the address of * interest and the corresponding memory 0 mapping will be used to * translate the address. */static WINDOW_OFFSETS dsWindowOffsets [] =    {    /* first two entries must be at the front of the table and in order */        {        DEC2155X_CFG_PRI_CSR_AND_DS_MEM0_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_SEC_CSR_MEM_BAR,        (~(DEC2155X_DEFAULT_MEM_WINDOW_SZ - 1) | PCI_BAR_SPACE_MEM),        NULL        },        {        DEC2155X_CFG_PRI_CSR_AND_DS_MEM0_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_DS_MEM0_TB,        DEC2155X_CFG_DS_MEM0_SETUP,        DEC2155X_DEFAULT_MEM_WINDOW_SZ        },        {        DEC2155X_CFG_PRI_CSR_IO_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_SEC_CSR_IO_BAR,        (~(DEC2155X_DEFAULT_IO_WINDOW_SZ - 1) | PCI_BAR_SPACE_IO),        NULL        },        {        DEC2155X_CFG_PRI_DS_IO_OR_MEM1_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_DS_IO_OR_MEM1_TB,        DEC2155X_CFG_DS_IO_OR_MEM1_SETUP,        NULL        },        {        DEC2155X_CFG_PRI_DS_MEM2_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_DS_MEM2_TB,        DEC2155X_CFG_DS_MEM2_SETUP,        NULL        },        {        DEC2155X_CFG_PRI_DS_MEM3_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        DEC2155X_CFG_DS_MEM3_TB,        DEC2155X_CFG_DS_MEM3_SETUP,        NULL        },    };static WINDOW_OFFSETS usWindowOffsets [] =    {        {        DEC2155X_CFG_SEC_CSR_MEM_BAR,        DEC2155X_CFG_PRI_CSR_AND_DS_MEM0_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        (~(DEC2155X_DEFAULT_MEM_WINDOW_SZ - 1) | PCI_BAR_SPACE_MEM),        NULL        },        {        DEC2155X_CFG_SEC_CSR_IO_BAR,        DEC2155X_CFG_PRI_CSR_IO_BAR+DEC2155X_PRI_FROM_SEC_OFFSET,        (~(DEC2155X_DEFAULT_IO_WINDOW_SZ - 1) | PCI_BAR_SPACE_IO),        NULL        },         {        DEC2155X_CFG_SEC_US_IO_OR_MEM0_BAR,        DEC2155X_CFG_US_IO_OR_MEM0_TB,        DEC2155X_CFG_US_IO_OR_MEM0_SETUP,        NULL        },        {        DEC2155X_CFG_SEC_US_MEM1_BAR,        DEC2155X_CFG_US_MEM1_TB,        DEC2155X_CFG_US_MEM1_SETUP,        NULL        }    };#define DS_WINDOW_COUNT (sizeof (dsWindowOffsets) / sizeof (WINDOW_OFFSETS))#define US_WINDOW_COUNT (sizeof (usWindowOffsets) / sizeof (WINDOW_OFFSETS))/* forward declarations */LOCAL FUNCPTR 	sysMailboxRoutine  = NULL;LOCAL int 	sysMailboxArg      = NULL;void 		sysDec2155xIntr (void);/* extern declarations */IMPORT int     intEnable (int);IMPORT int     intDisable (int);IMPORT INT_HANDLER_DESC * sysIntTbl [256];  /*  Intr vector table */IMPORT STATUS  pciConfigModifyLong (int, int, int, int, UINT32, UINT32);IMPORT STATUS  pciConfigModifyWord (int, int, int, int, UINT16, UINT16);IMPORT STATUS  pciConfigModifyByte (int, int, int, int, UINT8, UINT8);IMPORT void    sysPciInsertLong (UINT32, UINT32, UINT32);IMPORT void    sysPciInsertWord (UINT32, UINT16, UINT16);IMPORT void    sysPciInsertByte (UINT32, UINT8, UINT8);IMPORT void    sysOutByte (ULONG, UCHAR);IMPORT void    sysPciOutWordConfirm (UINT32, UINT16);/* globals */UINT32 sysDec2155xCsrAdrs = 0;	/* Base address of dec2155x CSR space *//* * If sysDec2155xInit finds the drawbridge in the wrong state this variable * will be set non-zero. */UINT32 sysDec2155xInitFail = 0;/* Arrays to hold the Dec2155x window translation values */WINDOW_PARAMETERS dsWindows[DS_WINDOW_COUNT] = {                                                   {                                                   0                                                   }                                               };WINDOW_PARAMETERS usWindows[US_WINDOW_COUNT] = {                                                   {                                                   0                                                   }                                               };/* Variables to hold the number of Dec2155x windows detected */UINT32 dsWinsValid = 0;UINT32 usWinsValid = 0;/* DEC 2155x Access macros */#ifndef DEC2155X_CSR_ADRS#   define DEC2155X_CSR_ADRS(offset) (sysDec2155xCsrAdrs+offset)#endif#ifndef DEC2155X_CFG_RD_LONG#   define DEC2155X_CFG_RD_LONG(offset, result) \           pciConfigInLong (0, DEC2155X_PCI_DEV_NUMBER, 0, (offset), \                            (UINT32 *)(result))#endif#ifndef DEC2155X_CFG_RD_WORD#   define DEC2155X_CFG_RD_WORD(offset, result) \           pciConfigInWord (0, DEC2155X_PCI_DEV_NUMBER, 0, (offset), \                            (UINT16 *)(result))#endif#ifndef DEC2155X_CFG_RD_BYTE#   define DEC2155X_CFG_RD_BYTE(offset, result) \           pciConfigInByte (0, DEC2155X_PCI_DEV_NUMBER, 0, (offset), \                            (UINT8 *)(result))#endif#ifndef DEC2155X_CFG_WR_LONG#   define DEC2155X_CFG_WR_LONG(offset, result) \           pciConfigOutLong (0, DEC2155X_PCI_DEV_NUMBER, 0, (offset), \                             (UINT32)(result))#endif#ifndef DEC2155X_CFG_WR_WORD  #   define DEC2155X_CFG_WR_WORD(offset, result) \           pciConfigOutWord (0, DEC2155X_PCI_DEV_NUMBER, 0, (offset), \                             (UINT16)(result))#endif

?? 快捷鍵說明

復制代碼 Ctrl + C
搜索代碼 Ctrl + F
全屏模式 F11
切換主題 Ctrl + Shift + D
顯示快捷鍵 ?
增大字號 Ctrl + =
減小字號 Ctrl + -
亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
男人操女人的视频在线观看欧美| 亚洲男人都懂的| 久草在线在线精品观看| 日韩欧美国产精品| 国产成人小视频| 一区二区三区在线免费视频| 欧美中文字幕一区二区三区| 亚洲一区欧美一区| 日韩一区二区免费视频| 国产尤物一区二区| 亚洲三级在线看| 欧美日韩久久一区二区| 久久99精品久久久久婷婷| 久久欧美中文字幕| 色婷婷激情久久| 婷婷丁香久久五月婷婷| 精品成人在线观看| 97久久精品人人做人人爽| 亚洲另类一区二区| 欧美成人一区二区三区在线观看| 国产风韵犹存在线视精品| 亚洲免费观看在线视频| 日韩视频一区二区三区在线播放| 国产v综合v亚洲欧| 一区二区三区日韩| 日韩精品一区二区三区在线播放| 成人av免费在线播放| 日韩精品每日更新| 国产精品乱码久久久久久| 欧美日韩中文字幕一区二区| 国内精品伊人久久久久av影院| ...中文天堂在线一区| 欧美一区二区视频在线观看| 成人福利视频网站| 麻豆国产欧美日韩综合精品二区 | 亚洲妇熟xx妇色黄| 久久亚洲一级片| 欧美亚洲动漫精品| 国产a区久久久| 三级久久三级久久| 亚洲欧美日韩一区二区三区在线观看| 日韩欧美一级在线播放| 在线看日本不卡| 成人a区在线观看| 激情综合色播五月| 亚洲第一狼人社区| 亚洲视频资源在线| 久久久久久一二三区| 欧美一区二区高清| 欧美亚洲日本国产| 日本精品视频一区二区| 国产·精品毛片| 精品影视av免费| 首页综合国产亚洲丝袜| 亚洲六月丁香色婷婷综合久久 | 国产精品久久久久久久久久久免费看 | 中文字幕精品一区二区精品绿巨人| 欧美日本一区二区| 精品污污网站免费看| 99精品视频在线播放观看| 国产91丝袜在线播放| 精品一区二区三区视频| 久久国产欧美日韩精品| 蜜臀精品一区二区三区在线观看| 天使萌一区二区三区免费观看| 亚洲精品欧美激情| 亚洲久草在线视频| 亚洲综合久久av| 亚洲女爱视频在线| 亚洲精品国产a| 亚洲激情图片一区| 亚洲电影中文字幕在线观看| 亚洲精品国产视频| 亚洲成人午夜影院| 日韩精品五月天| 毛片av一区二区三区| 免费成人美女在线观看| 美女看a上一区| 精品在线视频一区| 懂色一区二区三区免费观看| 国产精品自在欧美一区| 成人综合在线网站| 91色综合久久久久婷婷| 色综合激情五月| 欧美日韩中字一区| 日韩一级欧美一级| 欧美韩日一区二区三区| 综合久久久久久久| 亚洲va中文字幕| 另类小说图片综合网| 国产一区二区三区| 99久久久国产精品免费蜜臀| 在线观看视频一区二区 | 日韩欧美国产综合一区| 2014亚洲片线观看视频免费| 国产农村妇女毛片精品久久麻豆| 国产精品女主播av| 亚洲综合色丁香婷婷六月图片| 日韩国产精品久久久| 国产一区二区在线观看免费| 国产.欧美.日韩| 在线视频欧美区| 欧美成人在线直播| 国产精品成人免费| 天天影视网天天综合色在线播放| 久久精品久久99精品久久| 国产成人亚洲综合色影视| 日本精品视频一区二区三区| 91麻豆精品91久久久久同性| 久久精品一级爱片| 亚洲一区二区三区四区在线| 国产一区三区三区| 欧美系列亚洲系列| 国产日韩欧美综合一区| 亚洲综合在线第一页| 国内成人免费视频| 色综合激情久久| 久久婷婷综合激情| 亚洲高清在线精品| 成人高清视频在线观看| 51午夜精品国产| 亚洲三级在线免费观看| 日本aⅴ精品一区二区三区| 99久久综合色| 日韩免费高清电影| 亚洲综合无码一区二区| 国产成人综合精品三级| 欧美日韩mp4| 亚洲欧洲精品一区二区三区| 日韩成人dvd| 欧日韩精品视频| 中文字幕成人网| 麻豆精品国产传媒mv男同| 91黄色免费观看| 国产精品灌醉下药二区| 韩国精品主播一区二区在线观看 | 懂色av一区二区三区免费看| 欧美午夜精品理论片a级按摩| 久久精品视频在线看| 水蜜桃久久夜色精品一区的特点| 91女人视频在线观看| 国产日韩v精品一区二区| 日本在线不卡一区| 欧美在线观看18| 亚洲激情图片小说视频| 99久精品国产| 亚洲国产电影在线观看| 国产精品白丝jk白祙喷水网站| 欧美一卡二卡在线| 日韩中文字幕区一区有砖一区| 在线视频你懂得一区| 亚洲视频精选在线| 99久久国产免费看| 中文字幕av一区二区三区高| 精品一区二区久久| 日韩免费视频一区二区| 日本特黄久久久高潮| 欧美一区二视频| 午夜伦欧美伦电影理论片| 欧美日韩亚洲国产综合| 亚洲成人福利片| 欧美日本视频在线| 日欧美一区二区| 日韩精品在线一区二区| 美女任你摸久久| 精品久久久久久综合日本欧美| 美腿丝袜亚洲三区| 精品国产精品一区二区夜夜嗨| 韩国精品一区二区| 国产人妖乱国产精品人妖| 国产99久久久久久免费看农村| 国产日韩欧美麻豆| 成人涩涩免费视频| 亚洲欧洲精品成人久久奇米网| 99久久精品国产观看| 亚洲男帅同性gay1069| 91九色02白丝porn| 天天爽夜夜爽夜夜爽精品视频| 欧美美女激情18p| 乱一区二区av| 国产精品午夜电影| 欧美在线观看你懂的| 日韩电影在线观看网站| 久久综合久久综合久久| 国产成人精品一区二区三区网站观看| 中文久久乱码一区二区| 91视频91自| 免费高清不卡av| 欧美激情艳妇裸体舞| 欧美在线|欧美| 麻豆精品在线观看| 国产精品亲子乱子伦xxxx裸| 色呦呦日韩精品| 日韩av电影免费观看高清完整版 | 亚洲成a人在线观看| 精品国产一区二区三区四区四| 成人久久视频在线观看| 亚洲综合在线五月| 精品99一区二区| 91看片淫黄大片一级|