?? lpc177x_8x_emc.c
字號:
case 3:
LPC_EMC->DynamicConfig3 = (LPC_EMC->DynamicConfig3 & mask) | permission;
break;
}
}
/*********************************************************************//**
* @brief Set value for RAS latency
* @param[in] index index number, should be from 0 to 3
* @param[in] ras_val RAS value should be in range: 0..3
* @return None
**********************************************************************/
void EMC_DynMemRAS(uint32_t index , uint32_t ras_val)
{
uint32_t mask = ~(uint32_t)(0x03) ;
switch ( index)
{
case 0:
LPC_EMC->DynamicRasCas0 = (LPC_EMC->DynamicRasCas0 & mask) | ras_val;
break;
case 1:
LPC_EMC->DynamicRasCas1 = (LPC_EMC->DynamicRasCas1 & mask) | ras_val;
break;
case 2:
LPC_EMC->DynamicRasCas2 = (LPC_EMC->DynamicRasCas2 & mask) | ras_val;
break;
case 3:
LPC_EMC->DynamicRasCas3 = (LPC_EMC->DynamicRasCas3 & mask) | ras_val;
break;
}
}
/*********************************************************************//**
* @brief Set value for CAS latency
* @param[in] index index number, should be from 0 to 3
* @param[in] ras_val CAS value should be in range: 0..3
* @return None
**********************************************************************/
void EMC_DynMemCAS(uint32_t index , uint32_t cas_val)
{
uint32_t mask = ~(uint32_t)(_SBF(8, 0x03)) ;
switch ( index)
{
case 0:
LPC_EMC->DynamicRasCas0 = (LPC_EMC->DynamicRasCas0 & mask) | cas_val;
break;
case 1:
LPC_EMC->DynamicRasCas1 = (LPC_EMC->DynamicRasCas1 & mask) | cas_val;
break;
case 2:
LPC_EMC->DynamicRasCas2 = (LPC_EMC->DynamicRasCas2 & mask )| cas_val;
break;
case 3:
LPC_EMC->DynamicRasCas3 = ( LPC_EMC->DynamicRasCas3 & mask) | cas_val;
break;
}
}
/*********************************************************************//**
* @brief Configure the memory width
* @param[in] index index number, should be from 0 to 3
* @param[in] mem_width memory width, should be:
* - 0x00: 8-bits
* - 0x01: 16-bits
* - 0x02: 32-bits
* @return None
**********************************************************************/
void EMC_StaMemConfigMW(uint32_t index , uint32_t mem_width)
{
uint32_t mask = ~(uint32_t)(0x03) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | mem_width;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask) | mem_width;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask)| mem_width;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask) | mem_width;
break;
}
}
/*********************************************************************//**
* @brief Configure the page mode
* @param[in] index index number, should be from 0 to 3
* @param[in] page_mode page mode, should be:
* - 0: disable
* - 1: asynchronous page mode enable
* @return None
**********************************************************************/
void EMC_StaMemConfigPM(uint32_t index , uint32_t page_mode)
{
uint32_t mask = ~(uint32_t)(_BIT(3)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | page_mode;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask) | page_mode;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask)| page_mode;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask)| page_mode;
break;
}
}
/*********************************************************************//**
* @brief Configure the chip select polarity
* @param[in] index index number, should be from 0 to 3
* @param[in] pagepol_val_mode page mode, should be:
* - 0: Active LOW ship select
* - 1: Active HIGH chip select
* @return None
**********************************************************************/
void EMC_StaMemConfigPC(uint32_t index , uint32_t pol_val)
{
uint32_t mask = ~(uint32_t)(_BIT(6)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | pol_val;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask)| pol_val;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask) | pol_val;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask) | pol_val;
break;
}
}
/*********************************************************************//**
* @brief Configure the byte lane state
* @param[in] index index number, should be from 0 to 3
* @param[in] pb_val Byte lane state, should be:
* - 0: For reads all bits in BLSn[3:0] are HIGH.
* - 1: For reads all bits in BLSn[3:0] are LOW.
* @return None
**********************************************************************/
void EMC_StaMemConfigPB(uint32_t index , uint32_t pb_val)
{
uint32_t mask = ~(uint32_t)(_BIT(7)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask)| pb_val;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask)| pb_val;
break;
case 2:
LPC_EMC->StaticConfig2 =( LPC_EMC->StaticConfig2 & mask)| pb_val;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask)| pb_val;
break;
}
}
/*********************************************************************//**
* @brief Configure the extended wait value
* @param[in] index index number, should be from 0 to 3
* @param[in] ex_wait Extended wait mode, should be:
* - 0: Extended wait disabled.
* - 1: Extended wait enabled.
* @return None
**********************************************************************/
void EMC_StaMemConfigEW(uint32_t index , uint32_t ex_wait)
{
uint32_t mask = ~(uint32_t)(_BIT(8)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | ex_wait;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask) | ex_wait;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask) | ex_wait;
break;
case 3:
LPC_EMC->StaticConfig3 =( LPC_EMC->StaticConfig3 & mask) | ex_wait;
break;
}
}
/*********************************************************************//**
* @brief Configure the buffer enable value
* @param[in] index index number, should be from 0 to 3
* @param[in] buf_val Buffer mode, should be:
* - 0: Buffer disabled.
* - 1: Buffer enabled.
* @return None
**********************************************************************/
void EMC_StaMemConfigB(uint32_t index , uint32_t buf_val)
{
uint32_t mask = ~(uint32_t)(_BIT(19)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | buf_val;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask) | buf_val;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask) | buf_val;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask) | buf_val;
break;
}
}
/*********************************************************************//**
* @brief Configure the write permission
* @param[in] index index number, should be from 0 to 3
* @param[in] per_val Permission mode, should be:
* - 0: Write not protected.
* - 1: Write protected.
* @return None
**********************************************************************/
void EMC_StaMemConfigpP(uint32_t index , uint32_t per_val)
{
uint32_t mask = ~(uint32_t)(_BIT(20)) ;
switch ( index)
{
case 0:
LPC_EMC->StaticConfig0 = (LPC_EMC->StaticConfig0 & mask) | per_val;
break;
case 1:
LPC_EMC->StaticConfig1 = (LPC_EMC->StaticConfig1 & mask) | per_val;
break;
case 2:
LPC_EMC->StaticConfig2 = (LPC_EMC->StaticConfig2 & mask) | per_val;
break;
case 3:
LPC_EMC->StaticConfig3 = (LPC_EMC->StaticConfig3 & mask) | per_val;
break;
}
}
/*********************************************************************//**
* @brief Set the value of LPC_EMC static memory registers
* @param[in] index index number, should be from 0 to 3
* @param[in] EMC_STA_MEM_PAR Static register, should be:
* - EMC_STA_MEM_WAITWEN: StaticWaitWen0 register
* - EMC_STA_MEM_WAITOEN: StaticWaitOen0 register
* - EMC_STA_MEM_WAITRD: StaticWaitRd0 register
* - EMC_STA_MEM_WAITPAGE: StaticWaitPage0 register
* - EMC_STA_MEM_WAITWR: StaticWaitWr0 register
* - EMC_STA_MEM_WAITTURN: StaticWaitTurn0 register
* @return None
**********************************************************************/
void EMC_SetStaMemoryParameter(uint32_t index ,EMC_STA_MEM_PAR par, uint32_t val)
{
switch (index)
{
case 0:
switch ( par)
{
case EMC_STA_MEM_WAITWEN:
LPC_EMC->StaticWaitWen0 = val;
break;
case EMC_STA_MEM_WAITOEN:
LPC_EMC->StaticWaitOen0 = val;
break;
case EMC_STA_MEM_WAITRD:
LPC_EMC->StaticWaitRd0 = val;
break;
case EMC_STA_MEM_WAITPAGE:
LPC_EMC->StaticWaitPage0 = val;
break;
case EMC_STA_MEM_WAITWR:
LPC_EMC->StaticWaitWr0 = val;
break;
case EMC_STA_MEM_WAITTURN:
LPC_EMC->StaticWaitTurn0 = val;
break;
}
break;
case 1:
switch ( par)
{
case EMC_STA_MEM_WAITWEN:
LPC_EMC->StaticWaitWen1 = val;
break;
case EMC_STA_MEM_WAITOEN:
LPC_EMC->StaticWaitOen1 = val;
break;
case EMC_STA_MEM_WAITRD:
LPC_EMC->StaticWaitRd1 = val;
break;
case EMC_STA_MEM_WAITPAGE:
LPC_EMC->StaticWaitPage1 = val;
break;
case EMC_STA_MEM_WAITWR:
LPC_EMC->StaticWaitWr1 = val;
break;
case EMC_STA_MEM_WAITTURN:
LPC_EMC->StaticWaitTurn1 = val;
break;
}
break;
case 2:
switch ( par)
{
case EMC_STA_MEM_WAITWEN:
LPC_EMC->StaticWaitWen2 = val;
break;
case EMC_STA_MEM_WAITOEN:
LPC_EMC->StaticWaitOen2 = val;
break;
case EMC_STA_MEM_WAITRD:
LPC_EMC->StaticWaitRd2 = val;
break;
case EMC_STA_MEM_WAITPAGE:
LPC_EMC->StaticWaitPage2 = val;
break;
case EMC_STA_MEM_WAITWR:
LPC_EMC->StaticWaitWr2 = val;
break;
case EMC_STA_MEM_WAITTURN:
LPC_EMC->StaticWaitTurn2 = val;
break;
}
break;
case 3:
switch ( par)
{
case EMC_STA_MEM_WAITWEN:
LPC_EMC->StaticWaitWen3 = val;
break;
case EMC_STA_MEM_WAITOEN:
LPC_EMC->StaticWaitOen3 = val;
break;
case EMC_STA_MEM_WAITRD:
LPC_EMC->StaticWaitRd3 = val;
break;
case EMC_STA_MEM_WAITPAGE:
LPC_EMC->StaticWaitPage3 = val;
break;
case EMC_STA_MEM_WAITWR:
LPC_EMC->StaticWaitWr3 = val;
break;
case EMC_STA_MEM_WAITTURN:
LPC_EMC->StaticWaitTurn3 = val;
break;
}
break;
}
}
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