; generated by ARM C Compiler, ADS1.2 [Build 805]

; commandline [-O0 -browseinfo "0xff
" -S   -g+ -apcs /interwork -fk -J:cw:]
        CODE32

        AREA ||.text||, CODE, READONLY

initMemorry PROC
        STR      lr,[sp,#-4]!
        LDR      r3,|L1.408|
        LDR      r1,|L1.412|
        LDR      r2,|L1.416|
        MOV      r0,#0
|L1.20|
        CMP      r0,r2
        BCS      |L1.52|
        B        |L1.40|
|L1.32|
        ADD      r0,r0,#1
        B        |L1.20|
|L1.40|
        LDRB     lr,[r3],#1
        STRB     lr,[r1],#1
        B        |L1.32|
|L1.52|
        LDR      r1,|L1.420|
        LDR      r2,|L1.424|
        MOV      r0,#0
|L1.64|
        CMP      r0,r2
        BCS      |L1.96|
        B        |L1.84|
|L1.76|
        ADD      r0,r0,#1
        B        |L1.64|
|L1.84|
        MOV      r12,#0
        STRB     r12,[r1],#1
        B        |L1.76|
|L1.96|
        LDR      lr,[sp],#4
        BX       lr
        ENDP

loadkernel PROC
        STMFD    sp!,{r4-r6,lr}
        MOV      r0,#0
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x48]
        MOV      r0,#0x64
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x84]
        MOV      r0,#0x64
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x88]
        MOV      r0,#0
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x8c]
        MOV      r0,#3
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x80]
        MOV      r0,#1
        MOV      r1,#0x2000000
        STR      r0,[r1,#0xc0]
        MOV      r0,#0
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x100]
        LDR      r0,|L1.428|
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x104]
        MOV      r4,#0
|L1.208|
        CMP      r4,#0xa
        BGE      |L1.224|
        ADD      r4,r4,#1
        B        |L1.208|
|L1.224|
        MOV      r0,#1
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x100]
        MOV      r0,#0
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x104]
        MOV      r4,#0
|L1.252|
        CMP      r4,#0xa
        BGE      |L1.268|
        ADD      r4,r4,#1
        B        |L1.252|
|L1.268|
        MOV      r0,#2
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x100]
        MOV      r0,#0
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x104]
        MOV      r6,#0
|L1.296|
        CMP      r6,#0xdc
        BGE      |L1.360|
        B        |L1.316|
|L1.308|
        ADD      r6,r6,#1
        B        |L1.296|
|L1.316|
        MOV      r5,#0
|L1.320|
        CMP      r5,#0xb0
        BGE      |L1.356|
        B        |L1.340|
|L1.332|
        ADD      r5,r5,#1
        B        |L1.320|
|L1.340|
        MOV      r0,#0xf800
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x104]
        B        |L1.332|
|L1.356|
        B        |L1.308|
|L1.360|
        MOV      r0,#3
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x120]
        ADD      r0,r0,#0x100
        MOV      r1,#0x2000000
        STR      r0,[r1,#0x108]
        BL       initMemorry
        BL       start_kernel
        ADR      r0,|L1.432|
        BL       out
        NOP      
|L1.404|
        B        |L1.404|
|L1.408|
        DCD      ||Load$$ERAM$$Base||
|L1.412|
        DCD      ||Image$$ERAM$$Base||
|L1.416|
        DCD      ||Image$$ERAM$$Length||
|L1.420|
        DCD      ||Image$$ERAM$$ZI$$Base||
|L1.424|
        DCD      ||Image$$ERAM$$ZI$$Length||
|L1.428|
        DCD      0x0000dcb0
|L1.432|
        DCB      "can "
        DCB      "not "
        DCB      "run "
        DCB      "to h"
        DCB      "ere\r"
        DCB      "\n\0\0\0"
        ENDP



        EXPORT loadkernel
        EXPORT initMemorry

        IMPORT out
        IMPORT start_kernel
        IMPORT ||Image$$ERAM$$ZI$$Length||, WEAK
        IMPORT ||Image$$ERAM$$ZI$$Base||, WEAK
        IMPORT ||Image$$ERAM$$Length||, WEAK
        IMPORT ||Image$$ERAM$$Base||, WEAK
        IMPORT ||Load$$ERAM$$Base||, WEAK
        IMPORT ||Lib$$Request$$armlib||, WEAK

        KEEP ||BuildAttributes$$THUMB_ISAv1$M$PE$A:L22$X:L11$S22$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$PRES8||
||BuildAttributes$$THUMB_ISAv1$M$PE$A:L22$X:L11$S22$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$PRES8|| EQU 0

        ASSERT {ENDIAN} = "little"
        ASSERT {SWST} = {FALSE}
        ASSERT {NOSWST} = {TRUE}
        ASSERT {INTER} = {TRUE}
        ASSERT {ROPI} = {FALSE}
        ASSERT {RWPI} = {FALSE}
        ASSERT {NOT_SHL} = {TRUE}
        ASSERT {FULL_IEEE} = {FALSE}
        ASSERT {SHL1} = {FALSE}
        ASSERT {SHL2} = {FALSE}
        END