/* Simplified version of TMS320VC5402 DSK */
/* OVLY=1, FLASHENB=0, MP=1, DROM=0, DM_SEL=0, M_PG=0 */
/* Ignores FLASH and internal ROMs */
MEMORY DSK_ovly1_simplified {

   /* from 80h to 3FFFh is On-Chip and shared with data_memory */
   /* and also maps to the lower 16K of each external code page */
   SPACE program_memory PAGE 0:
      RESERVED    (    ): o= 0x0000 e= 0x007F /* unavailable for allocation */

      /* On-chip Dual Access RAM, divided into 2 8K blocks: */
      /* 80-1FFF, 2000-3FFF */
      DARAM       (RWX ): o= 0x0080 e= 0x3FFF

      /* 1WS onboard shared SRAM */
      /* at 4000-7FFF in prog mem and C000-FFFF in M_PG=0 data mem */
      SRAM_0Aa    (RWX ): o= 0x4000 e= 0x7FFF

      /* 1WS onboard shared SRAM */
      /* at 8000-FFFF in prog mem and 8000-FFFF in M_PG=1 data mem */
      SRAM_0B     (RWX ): o= 0x8000 e= 0xFF7F

      external_vectors
                  (RWX ): o= 0xFF80 e= 0xFFFF /* external interrupt vectors */

   /* from 80h to 3FFFh is On-Chip and shared with program_memory */
   SPACE data_memory PAGE 1:
      regs        (RW  ): o= 0x0000 e= 0x005F /* Memory-mapped registers */
      scratch     (RW  ): o= 0x0060 e= 0x007F /* Scratch-pad DARAM */

      /* repeat of SRAM or FLASH at 0xC000 - 0xFFFF */
      RESERVED    (    ): o= 0x4000 e= 0x7FFF

      SRAM_0A     (RW  ): o= 0x8000 e= 0xBFFF

   SPACE IO_memory PAGE 2:
      CPLD_Based_Control_Registers
                  (RW  ): o= 0x0000 e= 0x3FFF
      UART        (RW  ): o= 0x4000 e= 0x7FFF
      RESERVED_for_daughterboard
                  (RW  ): o= 0x8000 e= 0xFFFF
}

/* Table of address ranges vs. sets of spaces that share them. */
/* For each entry in the table,                                */
/* if a region's parent appears in the space set               */
/* and the region is fully contained in the address range,     */
/* then the region is shared with the other spaces of the set. */
SHARED_ADDRESSES DSK_ovly1_simplified {
   o= 0x0080 e= 0x3FFF {data_memory,
                        program_memory}

   { /* BEGIN sharing across set of ranges */
      o= 0x4000 e= 0x7FFF {program_memory}
      o= 0xC000 e= 0xFFFF {data_memory}
   } /* END sharing across set of ranges */

}