?? stm32f10x_adc.lst
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# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 15/May/2008 12:06:30 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
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# Cpu mode = thumb #
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# Source file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\FWLib\src\stm32f10x_adc.c #
# Command line = "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
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# MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -lb #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -o #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
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# Systems\Embedded Workbench #
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# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\..\..\FWLib\inc\" -I #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0\arm\INC\" #
# List file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\stm32f #
# 10x_adc.lst #
# Object file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
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C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM Encoder\example\FWLib\src\stm32f10x_adc.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_adc.c
3 * Author : MCD Application Team
4 * Date First Issued : 09/29/2006
5 * Description : This file provides all the ADC firmware functions.
6 ********************************************************************************
7 * History:
8 * 05/21/2007: V0.3
9 * 04/02/2007: V0.2
10 * 02/05/2007: V0.1
11 * 09/29/2006: V0.01
12 ********************************************************************************
13 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *******************************************************************************/
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_adc.h"
23 #include "stm32f10x_rcc.h"
24
25 /* Private typedef -----------------------------------------------------------*/
26 /* Private define ------------------------------------------------------------*/
27 /* ADC ADON mask */
28 #define CR2_ADON_Set ((u32)0x00000001)
29 #define CR2_ADON_Reset ((u32)0xFFFFFFFE)
30
31 /* ADC DMA mask */
32 #define CR2_DMA_Set ((u16)0x0100)
33 #define CR2_DMA_Reset ((u16)0xFEFF)
34
35 /* ADC RSTCAL mask */
36 #define CR2_RSTCAL_Set ((u16)0x0008)
37
38 /* ADC CAL mask */
39 #define CR2_CAL_Set ((u16)0x0004)
40
41 /* ADC SWSTRT mask */
42 #define CR2_SWSTRT_Set ((u32)0x00400000)
43
44 /* ADC DISCNUM mask */
45 #define CR1_DISCNUM_Reset ((u32)0xFFFF1FFF)
46
47 /* ADC DISCEN mask */
48 #define CR1_DISCEN_Set ((u32)0x00000800)
49 #define CR1_DISCEN_Reset ((u32)0xFFFFF7FF)
50
51 /* ADC EXTTRIG mask */
52 #define CR2_EXTTRIG_Set ((u32)0x00100000)
53 #define CR2_EXTTRIG_Reset ((u32)0xFFEFFFFF)
54
55 /* ADC Software start mask */
56 #define CR2_EXTTRIG_SWSTRT_Set ((u32)0x00500000)
57 #define CR2_EXTTRIG_SWSTRT_Reset ((u32)0xFFAFFFFF)
58
59 /* ADC JAUTO mask */
60 #define CR1_JAUTO_Set ((u32)0x00000400)
61 #define CR1_JAUTO_Reset ((u32)0xFFFFFBFF)
62
63 /* ADC JDISCEN mask */
64 #define CR1_JDISCEN_Set ((u32)0x00001000)
65 #define CR1_JDISCEN_Reset ((u32)0xFFFFEFFF)
66
67 /* ADC JEXTSEL mask */
68 #define CR2_JEXTSEL_Reset ((u32)0xFFFF8FFF)
69
70 /* ADC JEXTTRIG mask */
71 #define CR2_JEXTTRIG_Set ((u32)0x00008000)
72 #define CR2_JEXTTRIG_Reset ((u32)0xFFFF7FFF)
73
74 /* ADC JSWSTRT mask */
75 #define CR2_JSWSTRT_Set ((u32)0x00200000)
76
77 /* ADC injected software start mask */
78 #define CR2_JEXTTRIG_JSWSTRT_Set ((u32)0x00208000)
79 #define CR2_JEXTTRIG_JSWSTRT_Reset ((u32)0xFFDF7FFF)
80
81 /* ADC AWDCH mask */
82 #define CR1_AWDCH_Reset ((u32)0xFFFFFFE0)
83
84 /* ADC SQx mask */
85 #define SQR3_SQ_Set ((u8)0x1F)
86 #define SQR2_SQ_Set ((u8)0x1F)
87 #define SQR1_SQ_Set ((u8)0x1F)
88
89 /* ADC JSQx mask */
90 #define JSQR_JSQ_Set ((u8)0x1F)
91
92 /* ADC JL mask */
93 #define JSQR_JL_Reset ((u32)0xFFCFFFFF)
94
95 /* ADC SMPx mask */
96 #define SMPR1_SMP_Set ((u8)0x07)
97 #define SMPR2_SMP_Set ((u8)0x07)
98
99 /* ADC Analog watchdog enable mode mask */
100 #define CR1_AWDMode_Reset ((u32)0xFF3FFDFF)
101
102 /* ADC TSPD mask */
103 #define CR2_TSVREFE_Set ((u32)0x00800000)
104 #define CR2_TSVREFE_Reset ((u32)0xFF7FFFFF)
105
106 /* ADC JDRx registers= offset */
107 #define JDR_Offset ((u8)0x28)
108
109 /* ADC registers Masks */
110 #define CR1_CLEAR_Mask ((u32)0xFFF0FEFF)
111 #define CR2_CLEAR_Mask ((u32)0xFFF1F7FD)
112 #define SQR1_CLEAR_Mask ((u32)0xFF0FFFFF)
113
114 /* Private macro -------------------------------------------------------------*/
115 /* Private variables ---------------------------------------------------------*/
116 /* Private function prototypes -----------------------------------------------*/
117 /* Private functions ---------------------------------------------------------*/
118
119 /*******************************************************************************
120 * Function Name : ADC_DeInit
121 * Description : Deinitializes the ADCx peripheral registers to their default
122 * reset values.
123 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
124 * Output : None
125 * Return : None
126 *******************************************************************************/
127 void ADC_DeInit(ADC_TypeDef* ADCx)
128 {
129 switch (*(u32*)&ADCx)
130 {
131 case ADC1_BASE:
132 /* Enable ADC1 reset state */
133 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
134 /* Release ADC1 from reset state */
135 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
136 break;
137
138 case ADC2_BASE:
139 /* Enable ADC2 reset state */
140 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
141 /* Release ADC2 from reset state */
142 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
143 break;
144
145 default:
146 break;
147 }
148 }
149
150 /*******************************************************************************
151 * Function Name : ADC_Init
152 * Description : Initializes the ADCx peripheral according to the specified parameters
153 * in the ADC_InitStruct.
154 * Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
155 * - ADC_InitStruct: pointer to an ADC_InitTypeDef structure that
156 * contains the configuration information for the specified
157 * ADC peripheral.
158 * Output : None
159 * Return : None
160 ******************************************************************************/
161 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
162 {
163 u32 tmpreg1 = 0;
164 u8 tmpreg2 = 0;
165
166 /* Check the parameters */
167 assert(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
168 assert(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
169 assert(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
170 assert(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
171 assert(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
172 assert(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
173
174 /*---------------------------- ADCx CR1 Configuration -----------------*/
175 /* Get the ADCx CR1 value */
176 tmpreg1 = ADCx->CR1;
177 /* Clear DUALMODE and SCAN bits */
178 tmpreg1 &= CR1_CLEAR_Mask;
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