?? stm32f10x_usart.lst
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# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 15/May/2008 12:06:34 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Stack alignment = 4 #
# Source file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\FWLib\src\stm32f10x_usart.c #
# Command line = "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\FWLib\src\stm32f10x_usart.c" -D #
# VECT_TAB_FLASH -lcN "C:\David JIANG\ST #
# MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -lb #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\" -o #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\Obj\" -z3 #
# --no_cse --no_unroll --no_inline --no_code_motion #
# --no_tbaa --no_clustering --no_scheduling --debug #
# --cpu_mode thumb --endian little --cpu cortex-M3 #
# --stack_align 4 --require_prototypes --fpu None #
# --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench #
# 4.0\arm\LIB\dl7mptnnl8f.h" -I "C:\David JIANG\ST #
# MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\" -I "C:\David #
# JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\..\include\" -I #
# "C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\..\..\FWLib\inc\" -I #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0\arm\INC\" #
# List file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\List\stm32f #
# 10x_usart.lst #
# Object file = C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM #
# Encoder\example\project\EWARM\BOOT_FLASH\Obj\stm32f1 #
# 0x_usart.r79 #
# #
# #
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C:\David JIANG\ST MCU\Docs\STM32\AN_JIANG\TIM Encoder\example\FWLib\src\stm32f10x_usart.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_usart.c
3 * Author : MCD Application Team
4 * Date First Issued : 09/29/2006
5 * Description : This file provides all the USART firmware functions.
6 ********************************************************************************
7 * History:
8 * 05/21/2007: V0.3
9 * 04/02/2007: V0.2
10 * 02/05/2007: V0.1
11 * 09/29/2006: V0.01
12 ********************************************************************************
13 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *******************************************************************************/
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_usart.h"
23 #include "stm32f10x_rcc.h"
24
25 /* Private typedef -----------------------------------------------------------*/
26 /* Private define ------------------------------------------------------------*/
27 /* USART RUN Mask */
28 #define CR1_RUN_Set ((u16)0x2000) /* USART Enable Mask */
29 #define CR1_RUN_Reset ((u16)0xDFFF) /* USART Disable Mask */
30
31 #define CR2_Address_Mask ((u16)0xFFF0) /* USART address Mask */
32
33 /* USART RWU Mask */
34 #define CR1_RWU_Set ((u16)0x0002) /* USART mute mode Enable Mask */
35 #define CR1_RWU_Reset ((u16)0xFFFD) /* USART mute mode Enable Mask */
36
37 #define USART_IT_Mask ((u16)0x001F) /* USART Interrupt Mask */
38
39 /* USART LIN Mask */
40 #define CR2_LINE_Set ((u16)0x4000) /* USART LIN Enable Mask */
41 #define CR2_LINE_Reset ((u16)0xBFFF) /* USART LIN Disable Mask */
42
43 #define CR1_SBK_Set ((u16)0x0001) /* USART Break Character send Mask */
44
45 /* USART SC Mask */
46 #define CR3_SCEN_Set ((u16)0x0020) /* USART SC Enable Mask */
47 #define CR3_SCEN_Reset ((u16)0xFFDF) /* USART SC Disable Mask */
48
49 /* USART SC NACK Mask */
50 #define CR3_NACK_Set ((u16)0x0010) /* USART SC NACK Enable Mask */
51 #define CR3_NACK_Reset ((u16)0xFFEF) /* USART SC NACK Disable Mask */
52
53 /* USART Half-Duplex Mask */
54 #define CR3_HDSEL_Set ((u16)0x0008) /* USART Half-Duplex Enable Mask */
55 #define CR3_HDSEL_Reset ((u16)0xFFF7) /* USART Half-Duplex Disable Mask */
56
57 /* USART IrDA Mask */
58 #define CR3_IRLP_Mask ((u16)0xFFFB) /* USART IrDA LowPower mode Mask */
59
60 /* USART LIN Break detection */
61 #define CR3_LBDL_Mask ((u16)0xFFDF) /* USART LIN Break detection Mask */
62
63 /* USART WakeUp Method */
64 #define CR3_WAKE_Mask ((u16)0xF7FF) /* USART WakeUp Method Mask */
65
66 /* USART IrDA Mask */
67 #define CR3_IREN_Set ((u16)0x0002) /* USART IrDA Enable Mask */
68 #define CR3_IREN_Reset ((u16)0xFFFD) /* USART IrDA Disable Mask */
69
70 #define GTPR_LSB_Mask ((u16)0x00FF) /* Guard Time Register LSB Mask */
71 #define GTPR_MSB_Mask ((u16)0xFF00) /* Guard Time Register MSB Mask */
72
73 #define CR1_CLEAR_Mask ((u16)0xE9F3) /* USART CR1 Mask */
74 #define CR2_CLEAR_Mask ((u16)0xC0FF) /* USART CR2 Mask */
75 #define CR3_CLEAR_Mask ((u16)0xFCFF) /* USART CR3 Mask */
76
77
78 /* Private macro -------------------------------------------------------------*/
79 /* Private variables ---------------------------------------------------------*/
80 /* Private function prototypes -----------------------------------------------*/
81 /* Private functions ---------------------------------------------------------*/
82
83 /*******************************************************************************
84 * Function Name : USART_DeInit
85 * Description : Deinitializes the USARTx peripheral registers to their
86 * default reset values.
87 * Input : - USARTx: where x can be 1, 2 or 3 to select the USART
88 * peripheral.
89 * Output : None
90 * Return : None
91 *******************************************************************************/
92 void USART_DeInit(USART_TypeDef* USARTx)
93 {
94 switch (*(u32*)&USARTx)
95 {
96 case USART1_BASE:
97 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
98 RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
99 break;
100
101 case USART2_BASE:
102 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
103 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
104 break;
105
106 case USART3_BASE:
107 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
108 RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
109 break;
110
111 default:
112 break;
113 }
114 }
115
116 /*******************************************************************************
117 * Function Name : USART_Init
118 * Description : Initializes the USARTx peripheral according to the specified
119 * parameters in the USART_InitStruct .
120 * Input : - USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
121 * - USART_InitStruct: pointer to a USART_InitTypeDef structure
122 * that contains the configuration information for the
123 * specified USART peripheral.
124 * Output : None
125 * Return : None
126 *******************************************************************************/
127 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
128 {
129 u32 tmpreg = 0x00, apbclock = 0x00;
130 u32 integerdivider = 0x00;
131 u32 fractionaldivider = 0x00;
132 RCC_ClocksTypeDef RCC_ClocksStatus;
133
134 /* Check the parameters */
135 assert(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
136 assert(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
137 assert(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
138 assert(IS_USART_PARITY(USART_InitStruct->USART_Parity));
139 assert(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
140 assert(IS_USART_MODE(USART_InitStruct->USART_Mode));
141 assert(IS_USART_CLOCK(USART_InitStruct->USART_Clock));
142 assert(IS_USART_CPOL(USART_InitStruct->USART_CPOL));
143 assert(IS_USART_CPHA(USART_InitStruct->USART_CPHA));
144 assert(IS_USART_LASTBIT(USART_InitStruct->USART_LastBit));
145
146 /*---------------------------- USART CR2 Configuration -----------------------*/
147 tmpreg = USARTx->CR2;
148 /* Clear STOP[13:12], CLKEN, CPOL, CPHA and LBCL bits */
149 tmpreg &= CR2_CLEAR_Mask;
150
151 /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
152 /* Set STOP[13:12] bits according to USART_Mode value */
153 /* Set CPOL bit according to USART_CPOL value */
154 /* Set CPHA bit according to USART_CPHA value */
155 /* Set LBCL bit according to USART_LastBit value */
156 tmpreg |= (u32)USART_InitStruct->USART_StopBits | USART_InitStruct->USART_Clock |
157 USART_InitStruct->USART_CPOL | USART_InitStruct->USART_CPHA |
158 USART_InitStruct->USART_LastBit;
159
160 /* Write to USART CR2 */
161 USARTx->CR2 = (u16)tmpreg;
162
163 /*---------------------------- USART CR1 Configuration -----------------------*/
164 tmpreg = 0x00;
165 tmpreg = USARTx->CR1;
166 /* Clear M, PCE, PS, TE and RE bits */
167 tmpreg &= CR1_CLEAR_Mask;
168
169 /* Configure the USART Word Length, Parity and mode ----------------------- */
170 /* Set the M bits according to USART_WordLength value */
171 /* Set PCE and PS bits according to USART_Parity value */
172 /* Set TE and RE bits according to USART_Mode value */
173 tmpreg |= (u32)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
174 USART_InitStruct->USART_Mode;
175
176 /* Write to USART CR1 */
177 USARTx->CR1 = (u16)tmpreg;
178
179 /*---------------------------- USART CR3 Configuration -----------------------*/
180 tmpreg = 0x00;
181 tmpreg = USARTx->CR3;
182 /* Clear CTSE and RTSE bits */
183 tmpreg &= CR3_CLEAR_Mask;
184
185 /* Configure the USART HFC -------------------------------------------------*/
186 /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
187 tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
188
189 /* Write to USART CR3 */
190 USARTx->CR3 = (u16)tmpreg;
191
192 /*---------------------------- USART BRR Configuration -----------------------*/
193 tmpreg = 0x00;
194
195 /* Configure the USART Baud Rate -------------------------------------------*/
196 RCC_GetClocksFreq(&RCC_ClocksStatus);
197 if ((*(u32*)&USARTx) == USART1_BASE)
198 {
199 apbclock = RCC_ClocksStatus.PCLK2_Frequency;
200 }
201 else
202 {
203 apbclock = RCC_ClocksStatus.PCLK1_Frequency;
204 }
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