/* Set the Prescaler value */
  TIM1->PSC = TIM1_TimeBaseInitStruct->TIM1_Prescaler;

  /* Select the Counter Mode and set the clock division */
  TIM1->CR1 &= CR1_CKD_Mask & CR1_CounterMode_Mask;
  TIM1->CR1 |= (u32)TIM1_TimeBaseInitStruct->TIM1_ClockDivision |
               TIM1_TimeBaseInitStruct->TIM1_CounterMode;

  /* Set the Repetition Counter value */
  TIM1->RCR = TIM1_TimeBaseInitStruct->TIM1_RepetitionCounter;
}

/*******************************************************************************
* Function Name  : TIM1_OC1Init
* Description    : Initializes the TIM1 Channel1 according to the specified
*                  parameters in the TIM1_OCInitStruct.
* Input          : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
*                    contains the configuration information for the TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_OC1Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
{
  u16 tmpccmr = 0;

  /* Check the parameters */
  assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
  assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
  assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
  assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
  assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
  assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
  assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState)); 

  tmpccmr = TIM1->CCMR1;

  /* Disable the Channel 1: Reset the CCE Bit */
  *(vu32 *) CCER_CC1E_BB = CCER_CCE_Reset;

  /* Reset the Output Compare Bits */
   tmpccmr &= OC13Mode_Mask;

  /* Set the Ouput Compare Mode */
  tmpccmr |= TIM1_OCInitStruct->TIM1_OCMode;

  TIM1->CCMR1 = tmpccmr;

  /* Set the Output State */
  *(vu32 *) CCER_CC1E_BB = TIM1_OCInitStruct->TIM1_OutputState;

  /* Set the Output N State */
  *(vu32 *) CCER_CC1NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;

  /* Set the Output Polarity */
  *(vu32 *) CCER_CC1P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;

  /* Set the Output N Polarity */
  *(vu32 *) CCER_CC1NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;

  /* Set the Output Idle state */
  *(vu32 *) CR2_OIS1_BB = TIM1_OCInitStruct->TIM1_OCIdleState;

  /* Set the Output N Idle state */
  *(vu32 *) CR2_OIS1N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;

  /* Set the Pulse value */
  TIM1->CCR1 = TIM1_OCInitStruct->TIM1_Pulse;
}

/*******************************************************************************
* Function Name  : TIM1_OC2Init
* Description    : Initializes the TIM1 Channel2 according to the specified
*                  parameters in the TIM1_OCInitStruct.
* Input          : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
*                    contains the configuration information for the TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_OC2Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
{
  u32 tmpccmr = 0;

  /* Check the parameters */
  assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
  assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
  assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
  assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
  assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
  assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
  assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState));

  tmpccmr = TIM1->CCMR1;

  /* Disable the Channel 2: Reset the CCE Bit */
  *(vu32 *) CCER_CC2E_BB = CCER_CCE_Reset;

  /* Reset the Output Compare Bits */
   tmpccmr &= OC24Mode_Mask;

  /* Set the Ouput Compare Mode */
  tmpccmr |= (u32)TIM1_OCInitStruct->TIM1_OCMode << 8;

  TIM1->CCMR1 = (u16)tmpccmr;

  /* Set the Output State */
  *(vu32 *) CCER_CC2E_BB = TIM1_OCInitStruct->TIM1_OutputState;

  /* Set the Output N State */
  *(vu32 *) CCER_CC2NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;

  /* Set the Output Polarity */
  *(vu32 *) CCER_CC2P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;

  /* Set the Output N Polarity */
  *(vu32 *) CCER_CC2NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;

  /* Set the Output Idle state */
  *(vu32 *) CR2_OIS2_BB = TIM1_OCInitStruct->TIM1_OCIdleState;

  /* Set the Output N Idle state */
  *(vu32 *) CR2_OIS2N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;

  /* Set the Pulse value */
  TIM1->CCR2 = TIM1_OCInitStruct->TIM1_Pulse;
}

/*******************************************************************************
* Function Name  : TIM1_OC3Init
* Description    : Initializes the TIM1 Channel3 according to the specified
*                  parameters in the TIM1_OCInitStruct.
* Input          : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
*                    contains the configuration information for the TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_OC3Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
{
  u16 tmpccmr = 0;

  /* Check the parameters */
  assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
  assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
  assert(IS_TIM1_OUTPUTN_STATE(TIM1_OCInitStruct->TIM1_OutputNState));
  assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
  assert(IS_TIM1_OCN_POLARITY(TIM1_OCInitStruct->TIM1_OCNPolarity));
  assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));
  assert(IS_TIM1_OCNIDLE_STATE(TIM1_OCInitStruct->TIM1_OCNIdleState));

  tmpccmr = TIM1->CCMR2;

  /* Disable the Channel 3: Reset the CCE Bit */
  *(vu32 *) CCER_CC3E_BB = CCER_CCE_Reset;

  /* Reset the Output Compare Bits */
   tmpccmr &= OC13Mode_Mask;

  /* Set the Ouput Compare Mode */
  tmpccmr |= TIM1_OCInitStruct->TIM1_OCMode;

  TIM1->CCMR2 = tmpccmr;

  /* Set the Output State */
  *(vu32 *) CCER_CC3E_BB = TIM1_OCInitStruct->TIM1_OutputState;

  /* Set the Output N State */
  *(vu32 *) CCER_CC3NE_BB = TIM1_OCInitStruct->TIM1_OutputNState;

  /* Set the Output Polarity */
  *(vu32 *) CCER_CC3P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;

  /* Set the Output N Polarity */
  *(vu32 *) CCER_CC3NP_BB = TIM1_OCInitStruct->TIM1_OCNPolarity;

  /* Set the Output Idle state */
  *(vu32 *) CR2_OIS3_BB = TIM1_OCInitStruct->TIM1_OCIdleState;

  /* Set the Output N Idle state */
  *(vu32 *) CR2_OIS3N_BB = TIM1_OCInitStruct->TIM1_OCNIdleState;

  /* Set the Pulse value */
  TIM1->CCR3 = TIM1_OCInitStruct->TIM1_Pulse;
}

/*******************************************************************************
* Function Name  : TIM1_OC4Init
* Description    : Initializes the TIM1 Channel4 according to the specified
*                  parameters in the TIM1_OCInitStruct.
* Input          : - TIM1_OCInitStruct: pointer to a TIM1_OCInitTypeDef structure that
*                    contains the configuration information for the TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_OC4Init(TIM1_OCInitTypeDef* TIM1_OCInitStruct)
{
  u32 tmpccmr = 0;

  /* Check the parameters */
  assert(IS_TIM1_OC_MODE(TIM1_OCInitStruct->TIM1_OCMode));
  assert(IS_TIM1_OUTPUT_STATE(TIM1_OCInitStruct->TIM1_OutputState));
  assert(IS_TIM1_OC_POLARITY(TIM1_OCInitStruct->TIM1_OCPolarity));
  assert(IS_TIM1_OCIDLE_STATE(TIM1_OCInitStruct->TIM1_OCIdleState));

  tmpccmr = TIM1->CCMR2;

  /* Disable the Channel 4: Reset the CCE Bit */
  *(vu32 *) CCER_CC4E_BB = CCER_CCE_Reset;

  /* Reset the Output Compare Bits */
   tmpccmr &= OC24Mode_Mask;

  /* Set the Ouput Compare Mode */
  tmpccmr |= (u32)TIM1_OCInitStruct->TIM1_OCMode << 8;

  TIM1->CCMR2 = (u16)tmpccmr;

  /* Set the Output State */
  *(vu32 *) CCER_CC4E_BB = TIM1_OCInitStruct->TIM1_OutputState;

  /* Set the Output Polarity */
  *(vu32 *) CCER_CC4P_BB = TIM1_OCInitStruct->TIM1_OCPolarity;

  /* Set the Output Idle state */
  *(vu32 *) CR2_OIS4_BB = TIM1_OCInitStruct->TIM1_OCIdleState;

  /* Set the Pulse value */
  TIM1->CCR4 = TIM1_OCInitStruct->TIM1_Pulse;
}

/*******************************************************************************
* Function Name  : TIM1_BDTRConfig
* Description    : Configures the: Break feature, dead time, Lock level, the OSSI,
*                  the OSSR State and the AOE(automatic output enable).
* Input          : - TIM1_BDTRInitStruct: pointer to a TIM1_BDTRInitTypeDef
*                    structure that contains the BDTR Register configuration
*                    information for the TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_BDTRConfig(TIM1_BDTRInitTypeDef *TIM1_BDTRInitStruct)
{
  u16 tmpbdtr = 0;

  /* Check the parameters */
  assert(IS_TIM1_OSSR_STATE(TIM1_BDTRInitStruct->TIM1_OSSRState));
  assert(IS_TIM1_OSSI_STATE(TIM1_BDTRInitStruct->TIM1_OSSIState));
  assert(IS_TIM1_LOCK_LEVEL(TIM1_BDTRInitStruct->TIM1_LOCKLevel));
  assert(IS_TIM1_BREAK_STATE(TIM1_BDTRInitStruct->TIM1_Break));
  assert(IS_TIM1_BREAK_POLARITY(TIM1_BDTRInitStruct->TIM1_BreakPolarity));
  assert(IS_TIM1_AUTOMATIC_OUTPUT_STATE(TIM1_BDTRInitStruct->TIM1_AutomaticOutput));

  tmpbdtr = TIM1->BDTR;

  /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State,
     the OSSI State, the dead time value and the Automatic Output Enable Bit */

  tmpbdtr = (u32)TIM1_BDTRInitStruct->TIM1_OSSRState | TIM1_BDTRInitStruct->TIM1_OSSIState |
             TIM1_BDTRInitStruct->TIM1_LOCKLevel | TIM1_BDTRInitStruct->TIM1_DeadTime |
			 TIM1_BDTRInitStruct->TIM1_Break | TIM1_BDTRInitStruct->TIM1_BreakPolarity |
             TIM1_BDTRInitStruct->TIM1_AutomaticOutput;

  TIM1->BDTR = tmpbdtr;
}

/*******************************************************************************
* Function Name  : TIM1_ICInit
* Description    : Initializes the TIM1 peripheral according to the specified
*                  parameters in the TIM1_ICInitStruct.
* Input          : - TIM1_ICInitStruct: pointer to a TIM1_ICInitTypeDef structure
*                    that contains the configuration information for the specified
*                    TIM1 peripheral.
* Output         : None
* Return         : None
*******************************************************************************/
void TIM1_ICInit(TIM1_ICInitTypeDef* TIM1_ICInitStruct)
{
  /* Check the parameters */
  assert(IS_TIM1_CHANNEL(TIM1_ICInitStruct->TIM1_Channel));
  assert(IS_TIM1_IC_POLARITY(TIM1_ICInitStruct->TIM1_ICPolarity));
  assert(IS_TIM1_IC_SELECTION(TIM1_ICInitStruct->TIM1_ICSelection));
  assert(IS_TIM1_IC_PRESCALER(TIM1_ICInitStruct->TIM1_ICPrescaler));
  assert(IS_TIM1_IC_FILTER(TIM1_ICInitStruct->TIM1_ICFilter));

  if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_1)
  {
    /* TI1 Configuration */
    TI1_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
               TIM1_ICInitStruct->TIM1_ICSelection,
               TIM1_ICInitStruct->TIM1_ICFilter);

    /* Set the Input Capture Prescaler value */
    TIM1_SetIC1Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
  }
  else if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_2)
  {
    /* TI2 Configuration */
    TI2_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
               TIM1_ICInitStruct->TIM1_ICSelection,
               TIM1_ICInitStruct->TIM1_ICFilter);

    /* Set the Input Capture Prescaler value */
    TIM1_SetIC2Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
  }
  else if (TIM1_ICInitStruct->TIM1_Channel == TIM1_Channel_3)
  {
    /* TI3 Configuration */
    TI3_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
               TIM1_ICInitStruct->TIM1_ICSelection,
               TIM1_ICInitStruct->TIM1_ICFilter);

    /* Set the Input Capture Prescaler value */
    TIM1_SetIC3Prescaler(TIM1_ICInitStruct->TIM1_ICPrescaler);
  }
  else
  {
    /* TI4 Configuration */
    TI4_Config(TIM1_ICInitStruct->TIM1_ICPolarity,
               TIM1_ICInitStruct->TIM1_ICSelection,
               TIM1_ICInitStruct->TIM1_ICFilter);