break;
		}
	      
	      /* No more access to user memory, it is safe
		 to use static data now */
	      FPU_st0_ptr = &st(0);
	      FPU_st0_tag = FPU_st0_ptr->tag;

	      /* NaN operands have the next priority. */
	      /* We have to delay looking at st(0) until after
		 loading the data, because that data might contain an SNaN */
	      if ( (FPU_st0_tag == TW_NaN) ||
		  (FPU_loaded_data.tag == TW_NaN) )
		{
		  /* Restore the status word; we might have loaded a
		     denormal. */
		  partial_status = status1;
		  if ( (FPU_modrm & 0x30) == 0x10 )
		    {
		      /* fcom or fcomp */
		      EXCEPTION(EX_Invalid);
		      setcc(SW_C3 | SW_C2 | SW_C0);
		      if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
			pop();             /* fcomp, masked, so we pop. */
		    }
		  else
		    {
#ifdef PECULIAR_486
		      /* This is not really needed, but gives behaviour
			 identical to an 80486 */
		      if ( (FPU_modrm & 0x28) == 0x20 )
			/* fdiv or fsub */
			real_2op_NaN(&FPU_loaded_data, FPU_st0_ptr,
				     FPU_st0_ptr);
		      else
#endif PECULIAR_486
			/* fadd, fdivr, fmul, or fsubr */
			real_2op_NaN(FPU_st0_ptr, &FPU_loaded_data,
				     FPU_st0_ptr);
		    }
		  goto reg_mem_instr_done;
		}

	      if ( unmasked && !((FPU_modrm & 0x30) == 0x10) )
		{
		  /* Is not a comparison instruction. */
		  if ( (FPU_modrm & 0x38) == 0x38 )
		    {
		      /* fdivr */
		      if ( (FPU_st0_tag == TW_Zero) &&
			  (FPU_loaded_data.tag == TW_Valid) )
			{
			  if ( divide_by_zero(FPU_loaded_data.sign,
					      FPU_st0_ptr) )
			    {
			      /* We use the fact here that the unmasked
				 exception in the loaded data was for a
				 denormal operand */
			      /* Restore the state of the denormal op bit */
			      partial_status &= ~SW_Denorm_Op;
			      partial_status |= status1 & SW_Denorm_Op;
			    }
			}
		    }
		  goto reg_mem_instr_done;
		}

	      switch ( (FPU_modrm >> 3) & 7 )
		{
		case 0:         /* fadd */
		  clear_C1();
		  reg_add(FPU_st0_ptr, &FPU_loaded_data, FPU_st0_ptr,
			  control_word);
		  break;
		case 1:         /* fmul */
		  clear_C1();
		  reg_mul(FPU_st0_ptr, &FPU_loaded_data, FPU_st0_ptr,
			  control_word);
		  break;
		case 2:         /* fcom */
		  compare_st_data();
		  break;
		case 3:         /* fcomp */
		  if ( !compare_st_data() && !unmasked )
		    pop();
		  break;
		case 4:         /* fsub */
		  clear_C1();
		  reg_sub(FPU_st0_ptr, &FPU_loaded_data, FPU_st0_ptr,
			  control_word);
		  break;
		case 5:         /* fsubr */
		  clear_C1();
		  reg_sub(&FPU_loaded_data, FPU_st0_ptr, FPU_st0_ptr,
			  control_word);
		  break;
		case 6:         /* fdiv */
		  clear_C1();
		  reg_div(FPU_st0_ptr, &FPU_loaded_data, FPU_st0_ptr,
			  control_word);
		  break;
		case 7:         /* fdivr */
		  clear_C1();
		  if ( FPU_st0_tag == TW_Zero )
		    partial_status = status1;  /* Undo any denorm tag,
					       zero-divide has priority. */
		  reg_div(&FPU_loaded_data, FPU_st0_ptr, FPU_st0_ptr,
			  control_word);
		  break;
		}
	    }
	  else
	    {
	      if ( (FPU_modrm & 0x30) == 0x10 )
		{
		  /* The instruction is fcom or fcomp */
		  EXCEPTION(EX_StackUnder);
		  setcc(SW_C3 | SW_C2 | SW_C0);
		  if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
		    pop();             /* fcomp */
		}
	      else
		stack_underflow();
	    }
	}
      else
	{
	  load_store_instr(((FPU_modrm & 0x38) | (byte1 & 6)) >> 1,
			   addr_modes);
	}

    reg_mem_instr_done:

#ifndef PECULIAR_486
      *(unsigned short *)&operand_selector = FPU_data_selector;
#endif PECULIAR_486
      ;
    }
  else
    {
      /* None of these instructions access user memory */
      unsigned char instr_index = (FPU_modrm & 0x38) | (byte1 & 7);

#ifdef PECULIAR_486
      /* This is supposed to be undefined, but a real 80486 seems
	 to do this: */
      FPU_data_address = 0;
#endif PECULIAR_486

      FPU_st0_ptr = &st(0);
      FPU_st0_tag = FPU_st0_ptr->tag;
      switch ( type_table[(int) instr_index] )
	{
	case _NONE_:   /* also _REGIc: _REGIn */
	  break;
	case _REG0_:
	  if ( !NOT_EMPTY_0 )
	    {
	      stack_underflow();
	      goto FPU_instruction_done;
	    }
	  break;
	case _REGIi:
	  if ( !NOT_EMPTY_0 || !NOT_EMPTY(FPU_rm) )
	    {
	      stack_underflow_i(FPU_rm);
	      goto FPU_instruction_done;
	    }
	  break;
	case _REGIp:
	  if ( !NOT_EMPTY_0 || !NOT_EMPTY(FPU_rm) )
	    {
	      stack_underflow_pop(FPU_rm);
	      goto FPU_instruction_done;
	    }
	  break;
	case _REGI_:
	  if ( !NOT_EMPTY_0 || !NOT_EMPTY(FPU_rm) )
	    {
	      stack_underflow();
	      goto FPU_instruction_done;
	    }
	  break;
	case _PUSH_:     /* Only used by the fld st(i) instruction */
	  break;
	case _null_:
	  FPU_illegal();
	  goto FPU_instruction_done;
	default:
	  EXCEPTION(EX_INTERNAL|0x111);
	  goto FPU_instruction_done;
	}
      (*st_instr_table[(int) instr_index])();
    }

FPU_instruction_done:

  ip_offset = FPU_entry_eip;
  cs_selector = FPU_entry_op_cs;
  data_operand_offset = (unsigned long)FPU_data_address;
#ifdef PECULIAR_486
  *(unsigned short *)&operand_selector = FPU_data_selector;
#endif PECULIAR_486
  
FPU_fwait_done:

#ifdef DEBUG
  RE_ENTRANT_CHECK_OFF;
  emu_printall();
  RE_ENTRANT_CHECK_ON;
#endif DEBUG

  if (FPU_lookahead && !need_resched)
    {
      FPU_ORIG_EIP = FPU_EIP;
      if ( valid_prefix(&byte1, (unsigned char **)&FPU_EIP,
			&addr_modes.override) )
	goto do_another_FPU_instruction;
    }

  if ( addr_modes.vm86 )
    FPU_EIP -= FPU_CS << 4;

  RE_ENTRANT_CHECK_OFF;
}


/* Support for prefix bytes is not yet complete. To properly handle
   all prefix bytes, further changes are needed in the emulator code
   which accesses user address space. Access to separate segments is
   important for msdos emulation. */
static int valid_prefix(unsigned char *Byte, unsigned char **fpu_eip,
			overrides *override)
{
  unsigned char byte;
  unsigned char *ip = *fpu_eip;

  *override = (overrides) { 0, 0, PREFIX_DS_ };       /* defaults */

  RE_ENTRANT_CHECK_OFF;
  FPU_code_verify_area(1);
  byte = get_fs_byte(ip);
  RE_ENTRANT_CHECK_ON;

  while ( 1 )
    {
      switch ( byte )
	{
	case ADDR_SIZE_PREFIX:
	  override->address_size = ADDR_SIZE_PREFIX;
	  goto do_next_byte;

	case OP_SIZE_PREFIX:
	  override->operand_size = OP_SIZE_PREFIX;
	  goto do_next_byte;

	case PREFIX_CS:
	  override->segment = PREFIX_CS_;
	  goto do_next_byte;
	case PREFIX_ES:
	  override->segment = PREFIX_ES_;
	  goto do_next_byte;
	case PREFIX_SS:
	  override->segment = PREFIX_SS_;
	  goto do_next_byte;
	case PREFIX_FS:
	  override->segment = PREFIX_FS_;
	  goto do_next_byte;
	case PREFIX_GS:
	  override->segment = PREFIX_GS_;
	  goto do_next_byte;

	case PREFIX_DS:   /* Redundant unless preceded by another override. */
	  override->segment = PREFIX_DS_;

/* lock is not a valid prefix for FPU instructions,
   let the cpu handle it to generate a SIGILL. */
/*	case PREFIX_LOCK: */

	  /* rep.. prefixes have no meaning for FPU instructions */
	case PREFIX_REPE:
	case PREFIX_REPNE:

	do_next_byte:
	  ip++;
	  RE_ENTRANT_CHECK_OFF;
	  FPU_code_verify_area(1);
	  byte = get_fs_byte(ip);
	  RE_ENTRANT_CHECK_ON;
	  break;
	case FWAIT_OPCODE:
	  *Byte = byte;
	  return 1;
	default:
	  if ( (byte & 0xf8) == 0xd8 )
	    {
	      *Byte = byte;
	      *fpu_eip = ip;
	      return 1;
	    }
	  else
	    {
	      /* Not a valid sequence of prefix bytes followed by
		 an FPU instruction. */
	      *Byte = byte;  /* Needed for error message. */
	      return 0;
	    }
	}
    }
}


void math_abort(struct info * info, unsigned int signal)
{
	FPU_EIP = FPU_ORIG_EIP;
	current->tss.trap_no = 16;
	current->tss.error_code = 0;
	send_sig(signal,current,1);
	RE_ENTRANT_CHECK_OFF;
	__asm__("movl %0,%%esp ; ret": :"g" (((long) info)-4));
#ifdef PARANOID
      printk("ERROR: wm-FPU-emu math_abort failed!\n");
#endif PARANOID
}