?? exm0951_1.mdl
字號:
Model {
Name "exm951"
Version 3.00
SimParamPage "Solver"
SampleTimeColors off
InvariantConstants off
WideVectorLines off
ShowLineWidths off
ShowPortDataTypes off
StartTime "0.0"
StopTime "10.0"
SolverMode "Auto"
Solver "ode45"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
InitialStep "auto"
FixedStep "auto"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Matrix"
LimitMaxRows off
MaxRows "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
IntegerOverflowMsg "warning"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
SignalLabelMismatchMsg "none"
ConsistencyChecking "off"
ZeroCross on
SimulationMode "normal"
BlockDataTips on
BlockParametersDataTip on
BlockAttributesDataTip off
BlockPortWidthsDataTip off
BlockDescriptionStringDataTip off
BlockMaskParametersDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
OptimizeBlockIOStorage on
BufferReuse on
BooleanDataType off
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "oneshot"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect off
Created "Mon Dec 13 13:33:20 1999"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Mon Dec 13 15:59:35 1999"
ModelVersionFormat "1.%<AutoIncrement:3>"
ConfigurationManager "none"
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "exm951"
Location [22, 91, 502, 284]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
ReportName "simulink-default.rpt"
Block {
BlockType Display
Name "C-D1"
Ports [1, 0, 0, 0, 0]
Position [315, 35, 405, 65]
Orientation "left"
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Display
Name "C-D2"
Ports [1, 0, 0, 0, 0]
Position [315, 85, 405, 115]
Orientation "left"
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType CombinatorialLogic
Name "C-Logic"
Position [160, 135, 190, 165]
TruthTable "[0 0;0 1;0 1;1 1]"
Port {
PortNumber 1
Name "c"
TestPoint off
RTWStorageClass "Auto"
}
}
Block {
BlockType Display
Name "D1"
Ports [1, 0, 0, 0, 0]
Position [215, 35, 305, 65]
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Display
Name "D2"
Ports [1, 0, 0, 0, 0]
Position [215, 85, 305, 115]
Format "short"
Decimation "1"
Floating off
SampleTime "-1"
}
Block {
BlockType Demux
Name "Demux"
Ports [1, 2, 0, 0, 0]
Position [440, 56, 445, 94]
Orientation "left"
BackgroundColor "black"
ShowName off
Outputs "2"
Port {
PortNumber 1
Name "c(1)"
TestPoint off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "c(2)"
TestPoint off
RTWStorageClass "Auto"
}
}
Block {
BlockType Logic
Name "Logic 1"
Ports [2, 1, 0, 0, 0]
Position [160, 32, 190, 63]
Operator "AND"
Inputs "2"
}
Block {
BlockType Logic
Name "Logic 2"
Ports [2, 1, 0, 0, 0]
Position [160, 82, 190, 113]
Operator "OR"
Inputs "2"
}
Block {
BlockType Mux
Name "Mux"
Ports [2, 1, 0, 0, 0]
Position [125, 131, 130, 169]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Constant
Name "a"
Position [50, 30, 80, 50]
Value "1"
}
Block {
BlockType Constant
Name "b"
Position [50, 150, 80, 170]
NamePlacement "alternate"
Value "0"
}
Line {
SrcBlock "Logic 2"
SrcPort 1
DstBlock "D2"
DstPort 1
}
Line {
SrcBlock "a"
SrcPort 1
Points [20, 0]
Branch {
DstBlock "Logic 1"
DstPort 1
}
Branch {
Points [0, 50]
Branch {
Points [0, 50]
DstBlock "Mux"
DstPort 1
}
Branch {
DstBlock "Logic 2"
DstPort 1
}
}
}
Line {
SrcBlock "Logic 1"
SrcPort 1
DstBlock "D1"
DstPort 1
}
Line {
SrcBlock "b"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "Mux"
DstPort 2
}
Branch {
Points [0, -55]
Branch {
Points [0, -50]
DstBlock "Logic 1"
DstPort 2
}
Branch {
DstBlock "Logic 2"
DstPort 2
}
}
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "C-Logic"
DstPort 1
}
Line {
Name "c(1)"
Labels [2, 1]
SrcBlock "Demux"
SrcPort 1
Points [-15, 0]
DstBlock "C-D1"
DstPort 1
}
Line {
Name "c(2)"
Labels [-1, 0]
SrcBlock "Demux"
SrcPort 2
Points [-15, 0]
DstBlock "C-D2"
DstPort 1
}
Line {
Name "c"
Labels [0, 0]
SrcBlock "C-Logic"
SrcPort 1
Points [265, 0]
DstBlock "Demux"
DstPort 1
}
Annotation {
Position [125, 125]
Text "Mux"
}
Annotation {
Position [437, 42]
Text "Demux"
}
}
}
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