<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="UDP_EPINT5"></a><b>UDP_EPINT5</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT5">AT91C_UDP_EPINT5</a></font></td><td><b>Endpoint 5 Interrupt</b><br>0 = No Endpoint5 Interrupt pending.<br>1 = Endpoint5 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR5:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP5INT is a sticky bit. Interrupt remains valid until EP5INT is cleared by writing in the corresponding USB_CSR5 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="UDP_EPINT6"></a><b>UDP_EPINT6</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT6">AT91C_UDP_EPINT6</a></font></td><td><b>Endpoint 6 Interrupt</b><br>0 = No Endpoint6 Interrupt pending.<br>1 = Endpoint6 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR6:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP6INT is a sticky bit. Interrupt remains valid until EP6INT is cleared by writing in the corresponding USB_CSR6 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="UDP_EPINT7"></a><b>UDP_EPINT7</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT7">AT91C_UDP_EPINT7</a></font></td><td><b>Endpoint 7 Interrupt</b><br>0 = No Endpoint7 Interrupt pending.<br>1 = Endpoint7 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR7:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP7INT is a sticky bit. Interrupt remains valid until EP7INT is cleared by writing in the corresponding USB_CSR7 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="UDP_RXSUSP"></a><b>UDP_RXSUSP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_RXSUSP">AT91C_UDP_RXSUSP</a></font></td><td><b>USB Suspend Interrupt</b><br>0 = No USB Suspend Interrupt pending.<br>1 = USB Suspend Interrupt has been raised.<br>The USB device sets this bit when it detects no activity for 3ms. The USB device enters Suspend mode.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="UDP_RXRSM"></a><b>UDP_RXRSM</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_RXRSM">AT91C_UDP_RXRSM</a></font></td><td><b>USB Resume Interrupt</b><br>0 = No USB Resume Interrupt pending.<br>1 =USB Resume Interrupt has been raised.<br>The USB device sets this bit when a USB resume signal is detected at its port.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">10</td><td align="CENTER"><a name="UDP_EXTRSM"></a><b>UDP_EXTRSM</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EXTRSM">AT91C_UDP_EXTRSM</a></font></td><td><b>USB External Resume Interrupt</b><br>0 = No External Resume Interrupt pending.<br>1 = External Resume Interrupt has been raised.<br>This interrupt is raised when, in suspend mode, an asynchronous rising edge on the send_resume is detected. If RMWUPE = 1, a resume state is sent in the USB bus.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">11</td><td align="CENTER"><a name="UDP_SOFINT"></a><b>UDP_SOFINT</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_SOFINT">AT91C_UDP_SOFINT</a></font></td><td><b>USB Start Of frame Interrupt</b><br>0 = No Start of Frame Interrupt pending.<br>1 = Start of Frame Interrupt has been raised.<br>This interrupt is raised each time a SOF token has been detected. It can be used as a synchronization signal by using isochronous endpoints.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">13</td><td align="CENTER"><a name="UDP_WAKEUP"></a><b>UDP_WAKEUP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_WAKEUP">AT91C_UDP_WAKEUP</a></font></td><td><b>USB Resume Interrupt</b><br>0 = No Wakeup Interrupt pending.<br>1 = A Wakeup Interrupt (USB Host Sent a RESUME or RESET) occurred since the last clear.</td></tr>
</null></table>
<a name="UDP_ISR"></a><h4><a href="#UDP">UDP</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> UDP_ISR  <i>Interrupt Status Register</i></h4><ul><null><font size="-2"><li><b>UDP</b> <i><a href="AT91RM9200_h.html#AT91C_UDP_ISR">AT91C_UDP_ISR</a></i> 0xFFFB001C</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="UDP_EPINT0"></a><b>UDP_EPINT0</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT0">AT91C_UDP_EPINT0</a></font></td><td><b>Endpoint 0 Interrupt</b><br>0 = No Endpoint0 Interrupt pending.<br>1 = Endpoint0 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR0:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP0INT is a sticky bit. Interrupt remains valid until EP0INT is cleared by writing in the corresponding USB_CSR0 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="UDP_EPINT1"></a><b>UDP_EPINT1</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT1">AT91C_UDP_EPINT1</a></font></td><td><b>Endpoint 0 Interrupt</b><br>0 = No Endpoint1 Interrupt pending.<br>1 = Endpoint1 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR1:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP1INT is a sticky bit. Interrupt remains valid until EP1INT is cleared by writing in the corresponding USB_CSR1 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="UDP_EPINT2"></a><b>UDP_EPINT2</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT2">AT91C_UDP_EPINT2</a></font></td><td><b>Endpoint 2 Interrupt</b><br>0 = No Endpoint2 Interrupt pending.<br>1 = Endpoint2 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR2:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP2INT is a sticky bit. Interrupt remains valid until EP2INT is cleared by writing in the corresponding USB_CSR2 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="UDP_EPINT3"></a><b>UDP_EPINT3</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT3">AT91C_UDP_EPINT3</a></font></td><td><b>Endpoint 3 Interrupt</b><br>0 = No Endpoint3 Interrupt pending.<br>1 = Endpoint3 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR3:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP3INT is a sticky bit. Interrupt remains valid until EP3INT is cleared by writing in the corresponding USB_CSR3 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="UDP_EPINT4"></a><b>UDP_EPINT4</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT4">AT91C_UDP_EPINT4</a></font></td><td><b>Endpoint 4 Interrupt</b><br>0 = No Endpoint4 Interrupt pending.<br>1 = Endpoint4 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR4:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP4INT is a sticky bit. Interrupt remains valid until EP4INT is cleared by writing in the corresponding USB_CSR4 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="UDP_EPINT5"></a><b>UDP_EPINT5</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT5">AT91C_UDP_EPINT5</a></font></td><td><b>Endpoint 5 Interrupt</b><br>0 = No Endpoint5 Interrupt pending.<br>1 = Endpoint5 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR5:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP5INT is a sticky bit. Interrupt remains valid until EP5INT is cleared by writing in the corresponding USB_CSR5 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="UDP_EPINT6"></a><b>UDP_EPINT6</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT6">AT91C_UDP_EPINT6</a></font></td><td><b>Endpoint 6 Interrupt</b><br>0 = No Endpoint6 Interrupt pending.<br>1 = Endpoint6 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR6:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP6INT is a sticky bit. Interrupt remains valid until EP6INT is cleared by writing in the corresponding USB_CSR6 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="UDP_EPINT7"></a><b>UDP_EPINT7</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT7">AT91C_UDP_EPINT7</a></font></td><td><b>Endpoint 7 Interrupt</b><br>0 = No Endpoint7 Interrupt pending.<br>1 = Endpoint7 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR7:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP7INT is a sticky bit. Interrupt remains valid until EP7INT is cleared by writing in the corresponding USB_CSR7 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">8</td><td align="CENTER"><a name="UDP_RXSUSP"></a><b>UDP_RXSUSP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_RXSUSP">AT91C_UDP_RXSUSP</a></font></td><td><b>USB Suspend Interrupt</b><br>0 = No USB Suspend Interrupt pending.<br>1 = USB Suspend Interrupt has been raised.<br>The USB device sets this bit when it detects no activity for 3ms. The USB device enters Suspend mode.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">9</td><td align="CENTER"><a name="UDP_RXRSM"></a><b>UDP_RXRSM</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_RXRSM">AT91C_UDP_RXRSM</a></font></td><td><b>USB Resume Interrupt</b><br>0 = No USB Resume Interrupt pending.<br>1 =USB Resume Interrupt has been raised.<br>The USB device sets this bit when a USB resume signal is detected at its port.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">10</td><td align="CENTER"><a name="UDP_EXTRSM"></a><b>UDP_EXTRSM</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EXTRSM">AT91C_UDP_EXTRSM</a></font></td><td><b>USB External Resume Interrupt</b><br>0 = No External Resume Interrupt pending.<br>1 = External Resume Interrupt has been raised.<br>This interrupt is raised when, in suspend mode, an asynchronous rising edge on the send_resume is detected. If RMWUPE = 1, a resume state is sent in the USB bus.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">11</td><td align="CENTER"><a name="UDP_SOFINT"></a><b>UDP_SOFINT</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_SOFINT">AT91C_UDP_SOFINT</a></font></td><td><b>USB Start Of frame Interrupt</b><br>0 = No Start of Frame Interrupt pending.<br>1 = Start of Frame Interrupt has been raised.<br>This interrupt is raised each time a SOF token has been detected. It can be used as a synchronization signal by using isochronous endpoints.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">12</td><td align="CENTER"><a name="UDP_ENDBUSRES"></a><b>UDP_ENDBUSRES</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_ENDBUSRES">AT91C_UDP_ENDBUSRES</a></font></td><td><b>USB End Of Bus Reset Interrupt</b><br>0 = No End of Bus Reset Interrupt pending.<br>1 = End of Bus Reset Interrupt has been raised.<br>This interrupt is raised at the end of a USB reset sequence. The USB device must prepare to receive requests on the end-point 0. The host will start the enumeration, then will perform the configuration.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">13</td><td align="CENTER"><a name="UDP_WAKEUP"></a><b>UDP_WAKEUP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_WAKEUP">AT91C_UDP_WAKEUP</a></font></td><td><b>USB Resume Interrupt</b><br>0 = No Wakeup Interrupt pending.<br>1 = A Wakeup Interrupt (USB Host Sent a RESUME or RESET) occurred since the last clear.</td></tr>
</null></table>
<a name="UDP_ICR"></a><h4><a href="#UDP">UDP</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> UDP_ICR  <i>Interrupt Clear Register</i></h4><ul><null><font size="-2"><li><b>UDP</b> <i><a href="AT91RM9200_h.html#AT91C_UDP_ICR">AT91C_UDP_ICR</a></i> 0xFFFB0020</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="UDP_EPINT0"></a><b>UDP_EPINT0</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT0">AT91C_UDP_EPINT0</a></font></td><td><b>Endpoint 0 Interrupt</b><br>0 = No Endpoint0 Interrupt pending.<br>1 = Endpoint0 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR0:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP0INT is a sticky bit. Interrupt remains valid until EP0INT is cleared by writing in the corresponding USB_CSR0 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="UDP_EPINT1"></a><b>UDP_EPINT1</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT1">AT91C_UDP_EPINT1</a></font></td><td><b>Endpoint 0 Interrupt</b><br>0 = No Endpoint1 Interrupt pending.<br>1 = Endpoint1 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR1:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP1INT is a sticky bit. Interrupt remains valid until EP1INT is cleared by writing in the corresponding USB_CSR1 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="UDP_EPINT2"></a><b>UDP_EPINT2</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT2">AT91C_UDP_EPINT2</a></font></td><td><b>Endpoint 2 Interrupt</b><br>0 = No Endpoint2 Interrupt pending.<br>1 = Endpoint2 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR2:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP2INT is a sticky bit. Interrupt remains valid until EP2INT is cleared by writing in the corresponding USB_CSR2 bit.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="UDP_EPINT3"></a><b>UDP_EPINT3</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_UDP_EPINT3">AT91C_UDP_EPINT3</a></font></td><td><b>Endpoint 3 Interrupt</b><br>0 = No Endpoint3 Interrupt pending.<br>1 = Endpoint3 Interrupt has been raised.<br>Several signals can generate this interrupt. The reason can be found by reading USB_CSR3:<br>RXSETUP set to 1<br>RX_DATA_BK0 set to 1<br>RX_DATA_BK1 set to 1<br>TXCOMP set to 1<br>STALLSENT set to 1<br>EP3INT is a sticky bit. Interrupt remains valid until EP3INT is cleared by writing in the corresponding USB_CSR3 bit.</td></tr>