</null></table></font>
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<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="MCI_TRDIR"></a><b>MCI_TRDIR</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TRDIR">AT91C_MCI_TRDIR</a></font></td><td><b>Transfer Direction</b><br>0: Write<br>1: Read</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">20..19</td><td align="CENTER"><a name="MCI_TRTYP"></a><b>MCI_TRTYP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TRTYP">AT91C_MCI_TRTYP</a></font></td><td><b>Transfer Type</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="MCI_TRTYP_BLOCK"></a><b>MCI_TRTYP_BLOCK</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_MCI_TRTYP_BLOCK">AT91C_MCI_TRTYP_BLOCK</a></font></td><td><br>Block Transfer type</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="MCI_TRTYP_MULTIPLE"></a><b>MCI_TRTYP_MULTIPLE</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_MCI_TRTYP_MULTIPLE">AT91C_MCI_TRTYP_MULTIPLE</a></font></td><td><br>Multiple Block transfer type</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="MCI_TRTYP_STREAM"></a><b>MCI_TRTYP_STREAM</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_MCI_TRTYP_STREAM">AT91C_MCI_TRTYP_STREAM</a></font></td><td><br>Stream transfer type</td></tr>
</null></table></font>
</td></tr>
</null></table>
<a name="MCI_RSPR"></a><h4><a href="#MCI">MCI</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> MCI_RSPR  <i>MCI Response Register</i></h4><ul><null><font size="-2"><li><b>MCI</b> <i><a href="AT91RM9200_h.html#AT91C_MCI_RSPR">AT91C_MCI_RSPR</a></i> 0xFFFB4020</font></null></ul><br>Response<a name="MCI_RDR"></a><h4><a href="#MCI">MCI</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> MCI_RDR  <i>MCI Receive Data Register</i></h4><ul><null><font size="-2"><li><b>MCI</b> <i><a href="AT91RM9200_h.html#AT91C_MCI_RDR">AT91C_MCI_RDR</a></i> 0xFFFB4030</font></null></ul><br>Data to read<a name="MCI_TDR"></a><h4><a href="#MCI">MCI</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> MCI_TDR  <i>MCI Transmit Data Register</i></h4><ul><null><font size="-2"><li><b>MCI</b> <i><a href="AT91RM9200_h.html#AT91C_MCI_TDR">AT91C_MCI_TDR</a></i> 0xFFFB4034</font></null></ul><br>Data to write<a name="MCI_SR"></a><h4><a href="#MCI">MCI</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> MCI_SR  <i>MCI Status Register</i></h4><ul><null><font size="-2"><li><b>MCI</b> <i><a href="AT91RM9200_h.html#AT91C_MCI_SR">AT91C_MCI_SR</a></i> 0xFFFB4040</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="MCI_CMDRDY"></a><b>MCI_CMDRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_CMDRDY">AT91C_MCI_CMDRDY</a></font></td><td><b>Command Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="MCI_RXRDY"></a><b>MCI_RXRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RXRDY">AT91C_MCI_RXRDY</a></font></td><td><b>RX Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="MCI_TXRDY"></a><b>MCI_TXRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TXRDY">AT91C_MCI_TXRDY</a></font></td><td><b>TX Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="MCI_BLKE"></a><b>MCI_BLKE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_BLKE">AT91C_MCI_BLKE</a></font></td><td><b>Data Block Transfer Ended flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="MCI_DTIP"></a><b>MCI_DTIP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DTIP">AT91C_MCI_DTIP</a></font></td><td><b>Data Transfer in Progress flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="MCI_NOTBUSY"></a><b>MCI_NOTBUSY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_NOTBUSY">AT91C_MCI_NOTBUSY</a></font></td><td><b>Data Line Not Busy flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="MCI_ENDRX"></a><b>MCI_ENDRX</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_ENDRX">AT91C_MCI_ENDRX</a></font></td><td><b>End of RX Buffer flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="MCI_ENDTX"></a><b>MCI_ENDTX</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_ENDTX">AT91C_MCI_ENDTX</a></font></td><td><b>End of TX Buffer flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14</td><td align="CENTER"><a name="MCI_RXBUFF"></a><b>MCI_RXBUFF</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RXBUFF">AT91C_MCI_RXBUFF</a></font></td><td><b>RX Buffer Full flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15</td><td align="CENTER"><a name="MCI_TXBUFE"></a><b>MCI_TXBUFE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TXBUFE">AT91C_MCI_TXBUFE</a></font></td><td><b>TX Buffer Empty flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="MCI_RINDE"></a><b>MCI_RINDE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RINDE">AT91C_MCI_RINDE</a></font></td><td><b>Response Index Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="MCI_RDIRE"></a><b>MCI_RDIRE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RDIRE">AT91C_MCI_RDIRE</a></font></td><td><b>Response Direction Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="MCI_RCRCE"></a><b>MCI_RCRCE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RCRCE">AT91C_MCI_RCRCE</a></font></td><td><b>Response CRC Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19</td><td align="CENTER"><a name="MCI_RENDE"></a><b>MCI_RENDE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RENDE">AT91C_MCI_RENDE</a></font></td><td><b>Response End Bit Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">20</td><td align="CENTER"><a name="MCI_RTOE"></a><b>MCI_RTOE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RTOE">AT91C_MCI_RTOE</a></font></td><td><b>Response Time-out Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">21</td><td align="CENTER"><a name="MCI_DCRCE"></a><b>MCI_DCRCE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DCRCE">AT91C_MCI_DCRCE</a></font></td><td><b>data CRC Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">22</td><td align="CENTER"><a name="MCI_DTOE"></a><b>MCI_DTOE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DTOE">AT91C_MCI_DTOE</a></font></td><td><b>Data timeout Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">30</td><td align="CENTER"><a name="MCI_OVRE"></a><b>MCI_OVRE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_OVRE">AT91C_MCI_OVRE</a></font></td><td><b>Overrun flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">31</td><td align="CENTER"><a name="MCI_UNRE"></a><b>MCI_UNRE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_UNRE">AT91C_MCI_UNRE</a></font></td><td><b>Underrun flag</b></td></tr>
</null></table>
<a name="MCI_IER"></a><h4><a href="#MCI">MCI</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> MCI_IER  <i>MCI Interrupt Enable Register</i></h4><ul><null><font size="-2"><li><b>MCI</b> <i><a href="AT91RM9200_h.html#AT91C_MCI_IER">AT91C_MCI_IER</a></i> 0xFFFB4044</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">0</td><td align="CENTER"><a name="MCI_CMDRDY"></a><b>MCI_CMDRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_CMDRDY">AT91C_MCI_CMDRDY</a></font></td><td><b>Command Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">1</td><td align="CENTER"><a name="MCI_RXRDY"></a><b>MCI_RXRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RXRDY">AT91C_MCI_RXRDY</a></font></td><td><b>RX Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">2</td><td align="CENTER"><a name="MCI_TXRDY"></a><b>MCI_TXRDY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TXRDY">AT91C_MCI_TXRDY</a></font></td><td><b>TX Ready flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">3</td><td align="CENTER"><a name="MCI_BLKE"></a><b>MCI_BLKE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_BLKE">AT91C_MCI_BLKE</a></font></td><td><b>Data Block Transfer Ended flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">4</td><td align="CENTER"><a name="MCI_DTIP"></a><b>MCI_DTIP</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DTIP">AT91C_MCI_DTIP</a></font></td><td><b>Data Transfer in Progress flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">5</td><td align="CENTER"><a name="MCI_NOTBUSY"></a><b>MCI_NOTBUSY</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_NOTBUSY">AT91C_MCI_NOTBUSY</a></font></td><td><b>Data Line Not Busy flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">6</td><td align="CENTER"><a name="MCI_ENDRX"></a><b>MCI_ENDRX</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_ENDRX">AT91C_MCI_ENDRX</a></font></td><td><b>End of RX Buffer flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">7</td><td align="CENTER"><a name="MCI_ENDTX"></a><b>MCI_ENDTX</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_ENDTX">AT91C_MCI_ENDTX</a></font></td><td><b>End of TX Buffer flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">14</td><td align="CENTER"><a name="MCI_RXBUFF"></a><b>MCI_RXBUFF</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RXBUFF">AT91C_MCI_RXBUFF</a></font></td><td><b>RX Buffer Full flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">15</td><td align="CENTER"><a name="MCI_TXBUFE"></a><b>MCI_TXBUFE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_TXBUFE">AT91C_MCI_TXBUFE</a></font></td><td><b>TX Buffer Empty flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="MCI_RINDE"></a><b>MCI_RINDE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RINDE">AT91C_MCI_RINDE</a></font></td><td><b>Response Index Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="MCI_RDIRE"></a><b>MCI_RDIRE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RDIRE">AT91C_MCI_RDIRE</a></font></td><td><b>Response Direction Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="MCI_RCRCE"></a><b>MCI_RCRCE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RCRCE">AT91C_MCI_RCRCE</a></font></td><td><b>Response CRC Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19</td><td align="CENTER"><a name="MCI_RENDE"></a><b>MCI_RENDE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RENDE">AT91C_MCI_RENDE</a></font></td><td><b>Response End Bit Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">20</td><td align="CENTER"><a name="MCI_RTOE"></a><b>MCI_RTOE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_RTOE">AT91C_MCI_RTOE</a></font></td><td><b>Response Time-out Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">21</td><td align="CENTER"><a name="MCI_DCRCE"></a><b>MCI_DCRCE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DCRCE">AT91C_MCI_DCRCE</a></font></td><td><b>data CRC Error flag</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">22</td><td align="CENTER"><a name="MCI_DTOE"></a><b>MCI_DTOE</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_MCI_DTOE">AT91C_MCI_DTOE</a></font></td><td><b>Data timeout Error flag</b></td></tr>