?? dm9000.c
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//*******************************************************************
// Copyright 2004 SHENZHEN UNIVERSITY EDA CENTER
/********************************************************************/
/*
* File: dm9000.c
* Purpose: dm9000 handle file.
*
* Notes:
*
* Author: Li KunHua
* Date: 2004-04-02
*
* Modifications:
*
*/
/********************************************************************/
#include "type.h"
#include "mcf5249.h"
#include "base.h"
#include "dm9000.h"
/********************************************************************/
//DM9000 NetCard init
uint16 DM9000_init(void)
{
imm2->gpio.GOR &= ~MCF5249_GPIO25; //DM9000 reset
delay100ms();
imm2->gpio.GOR |= MCF5249_GPIO25;
delay100ms();
DM9000_write(NCR, 0x01); //Soft reset
delay1ms();
DM9000_write(NCR, 0x00);
delay1ms();
DM9000_write(GPCR, 0x01); //Active the internal PHY
DM9000_write(GPR, 0x00);
DM9000_read(NSR); //Clear TX status register
DM9000_write(PAR0,0x07); //set MAC addr
DM9000_write(PAR1,0x08);
DM9000_write(PAR2,0x09);
DM9000_write(PAR3,0x0a);
DM9000_write(PAR4,0x0b);
DM9000_write(PAR5,0x0c);
DM9000_read(INTSR); //Clear interrupt status register
DM9000_write(IMR, 0x80); //Disable interrupt
DM9000_write(RCR, 0x01); //Enable RX
}
/********************************************************************/
//DM9000 NetCard init
uint16 DM9000_test(void)
{
Testflags = DM9000_read(GPCR);
Testflags = DM9000_read(RCR);
Testflags = DM9000_read(PAR0);
Testflags = DM9000_read(PAR1);
Testflags = DM9000_read(PAR2);
Testflags = DM9000_read(PAR3);
Testflags = DM9000_read(PAR4);
Testflags = DM9000_read(PAR5);
Testflags = PHY_read(BMCR);
Testflags = PHY_read(BMSR);
Testflags = PHY_read(PHYID1);
Testflags = PHY_read(PHYID2);
Testflags = PHY_read(ANAR);
Testflags = PHY_read(ANLPAR);
Testflags = PHY_read(ANER);
Testflags = PHY_read(DSCR);
Testflags = PHY_read(DSCSR);
Testflags = PHY_read(TENBTSCR);
}
/********************************************************************/
/********************************************************************/
/********************************************************************/
uint16 PHY_read(uint8 reg)
{
DM9000_write(EPAR,0x40|reg);
DM9000_write(EPCR,0x0c);
delay1ms();
DM9000_write(EPCR,0x00);
return ((DM9000_read(EPDRH)<<8)|DM9000_read(EPDRL));
}
void PHY_write(uint8 reg, uint16 data)
{
DM9000_write(EPAR,0x40|reg);
DM9000_write(EPDRL,data&0xff);
DM9000_write(EPDRH,(data>>8)&0xff);
DM9000_write(EPCR,0x0a);
delay1ms();
DM9000_write(EPCR,0x00);
}
/********************************************************************/
/********************************************************************/
/********************************************************************/
//Write (byte) data to DM9000 register
void DM9000_write(uint8 reg, uint8 data)
{
cpu_iowr_16(DM9000_COMMAND, reg);
cpu_iowr_16(DM9000_DATA, data);
}
//Read (byte) data from DM9000 register
uint8 DM9000_read(uint8 reg)
{
cpu_iowr_16(DM9000_COMMAND, reg);
return cpu_iord_16(DM9000_DATA);
}
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