?? stm8s_adc1.ls
字號(hào):
1347 ; 349 ADC1->CR2 &= (u8)(~ADC1_CR2_EXTSEL);
1349 016c c65402 ld a,21506
1350 016f a4cf and a,#207
1351 0171 c75402 ld 21506,a
1352 ; 351 if (NewState != DISABLE)
1354 0174 9f ld a,xl
1355 0175 4d tnz a
1356 0176 2706 jreq L555
1357 ; 354 ADC1->CR2 |= (u8)(ADC1_CR2_EXTTRIG);
1359 0178 721c5402 bset 21506,#6
1361 017c 2004 jra L755
1362 017e L555:
1363 ; 359 ADC1->CR2 &= (u8)(~ADC1_CR2_EXTTRIG);
1365 017e 721d5402 bres 21506,#6
1366 0182 L755:
1367 ; 363 ADC1->CR2 |= (u8)(ADC1_ExtTrigger);
1369 0182 c65402 ld a,21506
1370 0185 1a01 or a,(OFST+1,sp)
1371 0187 c75402 ld 21506,a
1372 ; 365 }
1375 018a 85 popw x
1376 018b 81 ret
1400 ; 378 void ADC1_StartConversion(void)
1400 ; 379 {
1401 switch .text
1402 018c _ADC1_StartConversion:
1406 ; 380 ADC1->CR1 |= ADC1_CR1_ADON;
1408 018c 72105401 bset 21505,#0
1409 ; 381 }
1412 0190 81 ret
1456 ; 391 u16 ADC1_GetConversionValue(void)
1456 ; 392 {
1457 switch .text
1458 0191 _ADC1_GetConversionValue:
1460 0191 5205 subw sp,#5
1461 00000005 OFST: set 5
1464 ; 394 u16 temph = 0;
1466 0193 1e04 ldw x,(OFST-1,sp)
1467 ; 395 u8 templ = 0;
1469 0195 7b03 ld a,(OFST-2,sp)
1470 0197 97 ld xl,a
1471 ; 397 if (ADC1->CR2 & ADC1_CR2_ALIGN) /* Right alignment */
1473 0198 c65402 ld a,21506
1474 019b a508 bcp a,#8
1475 019d 2719 jreq L316
1476 ; 400 templ = ADC1->DRL;
1478 019f c65405 ld a,21509
1479 01a2 6b03 ld (OFST-2,sp),a
1480 ; 402 temph = ADC1->DRH;
1482 01a4 c65404 ld a,21508
1483 01a7 5f clrw x
1484 01a8 97 ld xl,a
1485 01a9 1f04 ldw (OFST-1,sp),x
1486 ; 404 temph = (u16)(templ | (u16)(temph << (u8)8));
1488 01ab 1e04 ldw x,(OFST-1,sp)
1489 01ad 4f clr a
1490 01ae 02 rlwa x,a
1491 01af 01 rrwa x,a
1492 01b0 1a03 or a,(OFST-2,sp)
1493 01b2 02 rlwa x,a
1494 01b3 1f04 ldw (OFST-1,sp),x
1495 01b5 01 rrwa x,a
1497 01b6 2021 jra L516
1498 01b8 L316:
1499 ; 409 temph = ADC1->DRH;
1501 01b8 c65404 ld a,21508
1502 01bb 5f clrw x
1503 01bc 97 ld xl,a
1504 01bd 1f04 ldw (OFST-1,sp),x
1505 ; 411 templ = ADC1->DRL;
1507 01bf c65405 ld a,21509
1508 01c2 6b03 ld (OFST-2,sp),a
1509 ; 413 temph = (u16)((u16)(templ << (u8)6) | (u16)(temph << (u8)8));
1511 01c4 1e04 ldw x,(OFST-1,sp)
1512 01c6 4f clr a
1513 01c7 02 rlwa x,a
1514 01c8 1f01 ldw (OFST-4,sp),x
1515 01ca 7b03 ld a,(OFST-2,sp)
1516 01cc 97 ld xl,a
1517 01cd a640 ld a,#64
1518 01cf 42 mul x,a
1519 01d0 01 rrwa x,a
1520 01d1 1a02 or a,(OFST-3,sp)
1521 01d3 01 rrwa x,a
1522 01d4 1a01 or a,(OFST-4,sp)
1523 01d6 01 rrwa x,a
1524 01d7 1f04 ldw (OFST-1,sp),x
1525 01d9 L516:
1526 ; 416 return ((u16)temph);
1528 01d9 1e04 ldw x,(OFST-1,sp)
1531 01db 5b05 addw sp,#5
1532 01dd 81 ret
1578 ; 428 void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
1578 ; 429 {
1579 switch .text
1580 01de _ADC1_AWDChannelConfig:
1582 01de 89 pushw x
1583 00000000 OFST: set 0
1586 ; 431 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1588 ; 432 assert_param(IS_ADC1_CHANNEL_OK(Channel));
1590 ; 434 if (Channel < (u8)8)
1592 01df 9e ld a,xh
1593 01e0 a108 cp a,#8
1594 01e2 242e jruge L146
1595 ; 436 if (NewState != DISABLE)
1597 01e4 9f ld a,xl
1598 01e5 4d tnz a
1599 01e6 2714 jreq L346
1600 ; 438 ADC1->AWCRL |= (u8)((u8)1 << Channel);
1602 01e8 9e ld a,xh
1603 01e9 5f clrw x
1604 01ea 97 ld xl,a
1605 01eb a601 ld a,#1
1606 01ed 5d tnzw x
1607 01ee 2704 jreq L65
1608 01f0 L06:
1609 01f0 48 sll a
1610 01f1 5a decw x
1611 01f2 26fc jrne L06
1612 01f4 L65:
1613 01f4 ca540f or a,21519
1614 01f7 c7540f ld 21519,a
1616 01fa 2047 jra L746
1617 01fc L346:
1618 ; 442 ADC1->AWCRL &= (u8)(~((u8)1 << Channel));
1620 01fc 7b01 ld a,(OFST+1,sp)
1621 01fe 5f clrw x
1622 01ff 97 ld xl,a
1623 0200 a601 ld a,#1
1624 0202 5d tnzw x
1625 0203 2704 jreq L26
1626 0205 L46:
1627 0205 48 sll a
1628 0206 5a decw x
1629 0207 26fc jrne L46
1630 0209 L26:
1631 0209 43 cpl a
1632 020a c4540f and a,21519
1633 020d c7540f ld 21519,a
1634 0210 2031 jra L746
1635 0212 L146:
1636 ; 447 if (NewState != DISABLE)
1638 0212 0d02 tnz (OFST+2,sp)
1639 0214 2717 jreq L156
1640 ; 449 ADC1->AWCRH |= (u8)((u8)1 << (Channel - (u8)8));
1642 0216 7b01 ld a,(OFST+1,sp)
1643 0218 a008 sub a,#8
1644 021a 5f clrw x
1645 021b 97 ld xl,a
1646 021c a601 ld a,#1
1647 021e 5d tnzw x
1648 021f 2704 jreq L66
1649 0221 L07:
1650 0221 48 sll a
1651 0222 5a decw x
1652 0223 26fc jrne L07
1653 0225 L66:
1654 0225 ca540e or a,21518
1655 0228 c7540e ld 21518,a
1657 022b 2016 jra L746
1658 022d L156:
1659 ; 453 ADC1->AWCRH &= (u8)(~((u8)1 << (Channel - (u8)8)));
1661 022d 7b01 ld a,(OFST+1,sp)
1662 022f a008 sub a,#8
1663 0231 5f clrw x
1664 0232 97 ld xl,a
1665 0233 a601 ld a,#1
1666 0235 5d tnzw x
1667 0236 2704 jreq L27
1668 0238 L47:
1669 0238 48 sll a
1670 0239 5a decw x
1671 023a 26fc jrne L47
1672 023c L27:
1673 023c 43 cpl a
1674 023d c4540e and a,21518
1675 0240 c7540e ld 21518,a
1676 0243 L746:
1677 ; 456 }
1680 0243 85 popw x
1681 0244 81 ret
1716 ; 464 void ADC1_SetHighThreshold(u16 Threshold)
1716 ; 465 {
1717 switch .text
1718 0245 _ADC1_SetHighThreshold:
1722 ; 466 ADC1->HTRH = (u8)(Threshold >> (u8)8);
1724 0245 9e ld a,xh
1725 0246 c75408 ld 21512,a
1726 ; 467 ADC1->HTRL = (u8)Threshold;
1728 0249 9f ld a,xl
1729 024a c75409 ld 21513,a
1730 ; 468 }
1733 024d 81 ret
1768 ; 476 void ADC1_SetLowThreshold(u16 Threshold)
1768 ; 477 {
1769 switch .text
1770 024e _ADC1_SetLowThreshold:
1774 ; 478 ADC1->LTRL = (u8)Threshold;
1776 024e 9f ld a,xl
1777 024f c7540b ld 21515,a
1778 ; 479 ADC1->LTRH = (u8)(Threshold >> (u8)8);
1780 0252 9e ld a,xh
1781 0253 c7540a ld 21514,a
1782 ; 480 }
1785 0256 81 ret
1838 ; 489 u16 ADC1_GetBufferValue(u8 Buffer)
1838 ; 490 {
1839 switch .text
1840 0257 _ADC1_GetBufferValue:
1842 0257 88 push a
1843 0258 5205 subw sp,#5
1844 00000005 OFST: set 5
1847 ; 492 u16 temph = 0;
1849 025a 1e04 ldw x,(OFST-1,sp)
1850 ; 493 u8 templ = 0;
1852 025c 7b03 ld a,(OFST-2,sp)
1853 025e 97 ld xl,a
1854 ; 496 assert_param(IS_ADC1_BUFFER_OK(Buffer));
1856 ; 498 if (ADC1->CR2 & ADC1_CR2_ALIGN) /* Right alignment */
1858 025f c65402 ld a,21506
1859 0262 a508 bcp a,#8
1860 0264 2723 jreq L737
1861 ; 501 templ = *(u8*)(ADC1_BaseAddress + (Buffer << 1) + 1);
1863 0266 7b06 ld a,(OFST+1,sp)
1864 0268 5f clrw x
1865 0269 97 ld xl,a
1866 026a 58 sllw x
1867 026b d653e1 ld a,(21473,x)
1868 026e 6b03 ld (OFST-2,sp),a
1869 ; 503 temph = *(u8*)(ADC1_BaseAddress + (Buffer << 1));
1871 0270 7b06 ld a,(OFST+1,sp)
1872 0272 5f clrw x
1873 0273 97 ld xl,a
1874 0274 58 sllw x
1875 0275 d653e0 ld a,(21472,x)
1876 0278 5f clrw x
1877 0279 97 ld xl,a
1878 027a 1f04 ldw (OFST-1,sp),x
1879 ; 505 temph = (u16)(templ | (u16)(temph << (u8)8));
1881 027c 1e04 ldw x,(OFST-1,sp)
1882 027e 4f clr a
1883 027f 02 rlwa x,a
1884 0280 01 rrwa x,a
1885 0281 1a03 or a,(OFST-2,sp)
1886 0283 02 rlwa x,a
1887 0284 1f04 ldw (OFST-1,sp),x
1888 0286 01 rrwa x,a
1890 0287 202b jra L147
1891 0289 L737:
1892 ; 510 temph = *(u8*)(ADC1_BaseAddress + (Buffer << 1));
1894 0289 7b06 ld a,(OFST+1,sp)
1895 028b 5f clrw x
1896 028c 97 ld xl,a
1897 028d 58 sllw x
1898 028e d653e0 ld a,(21472,x)
1899 0291 5f clrw x
1900 0292 97 ld xl,a
1901 0293 1f04 ldw (OFST-1,sp),x
1902 ; 512 templ = *(u8*)(ADC1_BaseAddress + (Buffer << 1) + 1);
1904 0295 7b06 ld a,(OFST+1,sp)
1905 0297 5f clrw x
1906 0298 97 ld xl,a
1907 0299 58 sllw x
1908 029a d653e1 ld a,(21473,x)
1909 029d 6b03 ld (OFST-2,sp),a
1910 ; 514 temph = (u16)((u16)(templ << (u8)6) | (u16)(temph << (u8)8));
1912 029f 1e04 ldw x,(OFST-1,sp)
1913 02a1 4f clr a
1914 02a2 02 rlwa x,a
1915 02a3 1f01 ldw (OFST-4,sp),x
1916 02a5 7b03 ld a,(OFST-2,sp)
1917 02a7 97 ld xl,a
1918 02a8 a640 ld a,#64
1919 02aa 42 mul x,a
1920 02ab 01 rrwa x,a
1921 02ac 1a02 or a,(OFST-3,sp)
1922 02ae 01 rrwa x,a
1923 02af 1a01 or a,(OFST-4,sp)
1924 02b1 01 rrwa x,a
1925 02b2 1f04 ldw (OFST-1,sp),x
1926 02b4 L147:
1927 ; 517 return ((u16)temph);
1929 02b4 1e04 ldw x,(OFST-1,sp)
1932 02b6 5b06 addw sp,#6
1933 02b8 81 ret
1999 ; 527 FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
1999 ; 528 {
2000 switch .text
2001 02b9 _ADC1_GetAWDChannelStatus:
2003 02b9 88 push a
2004 02ba 88 push a
2005 00000001 OFST: set 1
2008 ; 529 u8 status = 0;
2010 02bb 0f01 clr (OFST+0,sp)
2011 ; 532 assert_param(IS_ADC1_CHANNEL_OK(Channel));
2013 ; 534 if (Channel < (u8)8)
2015 02bd a108 cp a,#8
2016 02bf 2412 jruge L577
2017 ; 536 status = (u8)(ADC1->AWSRL & ((u8)1 << Channel));
2019 02c1 5f clrw x
2020 02c2 97 ld xl,a
2021 02c3 a601 ld a,#1
2022 02c5 5d tnzw x
2023 02c6 2704 jreq L601
2024 02c8 L011:
2025 02c8 48 sll a
2026 02c9 5a decw x
2027 02ca 26fc jrne L011
2028 02cc L601:
2029 02cc c4540d and a,21517
2030 02cf 6b01 ld (OFST+0,sp),a
2032 02d1 2014 jra L777
2033 02d3 L577:
2034 ; 540 status = (u8)(ADC1->AWSRH & ((u8)1 << (Channel - (u8)8)));
2036 02d3 7b02 ld a,(OFST+1,sp)
2037 02d5 a008 sub a,#8
2038 02d7 5f clrw x
2039 02d8 97 ld xl,a
2040 02d9 a601 ld a,#1
2041 02db 5d tnzw x
2042 02dc 2704 jreq L211
2043 02de L411:
2044 02de 48 sll a
2045 02df 5a decw x
2046 02e0 26fc jrne L411
2047 02e2 L211:
2048 02e2 c4540c and a,21516
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