?? stm8s_adc2.ls
字號:
984 00e3 L514:
985 ; 224 ADC2->TDRH |= (u8)((u8)0x01 << ((u8)ADC2_SchmittTriggerChannel - (u8)8));
987 00e3 7b01 ld a,(OFST+1,sp)
988 00e5 a008 sub a,#8
989 00e7 5f clrw x
990 00e8 97 ld xl,a
991 00e9 a601 ld a,#1
992 00eb 5d tnzw x
993 00ec 2704 jreq L43
994 00ee L63:
995 00ee 48 sll a
996 00ef 5a decw x
997 00f0 26fc jrne L63
998 00f2 L43:
999 00f2 ca5406 or a,21510
1000 00f5 c75406 ld 21510,a
1001 00f8 L304:
1002 ; 228 }
1005 00f8 85 popw x
1006 00f9 81 ret
1063 ; 240 void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, ADC2_Channel_TypeDef ADC2_Channel, ADC2_Align_TypeDef ADC2_Align)
1063 ; 241 {
1064 switch .text
1065 00fa _ADC2_ConversionConfig:
1067 00fa 89 pushw x
1068 00000000 OFST: set 0
1071 ; 244 assert_param(IS_ADC2_CONVERSIONMODE_OK(ADC2_ConversionMode));
1073 ; 245 assert_param(IS_ADC2_CHANNEL_OK(ADC2_Channel));
1075 ; 246 assert_param(IS_ADC2_ALIGN_OK(ADC2_Align));
1077 ; 249 ADC2->CR2 &= (u8)(~ADC2_CR2_ALIGN);
1079 00fb 72175402 bres 21506,#3
1080 ; 251 ADC2->CR2 |= (u8)(ADC2_Align);
1082 00ff c65402 ld a,21506
1083 0102 1a05 or a,(OFST+5,sp)
1084 0104 c75402 ld 21506,a
1085 ; 253 if (ADC2_ConversionMode == ADC2_CONVERSIONMODE_CONTINUOUS)
1087 0107 9e ld a,xh
1088 0108 a101 cp a,#1
1089 010a 2606 jrne L744
1090 ; 256 ADC2->CR1 |= ADC2_CR1_CONT;
1092 010c 72125401 bset 21505,#1
1094 0110 2004 jra L154
1095 0112 L744:
1096 ; 261 ADC2->CR1 &= (u8)(~ADC2_CR1_CONT);
1098 0112 72135401 bres 21505,#1
1099 0116 L154:
1100 ; 265 ADC2->CSR &= (u8)(~ADC2_CSR_CH);
1102 0116 c65400 ld a,21504
1103 0119 a4f0 and a,#240
1104 011b c75400 ld 21504,a
1105 ; 267 ADC2->CSR |= (u8)(ADC2_Channel);
1107 011e c65400 ld a,21504
1108 0121 1a02 or a,(OFST+2,sp)
1109 0123 c75400 ld 21504,a
1110 ; 269 }
1113 0126 85 popw x
1114 0127 81 ret
1160 ; 282 void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState)
1160 ; 283 {
1161 switch .text
1162 0128 _ADC2_ExternalTriggerConfig:
1164 0128 89 pushw x
1165 00000000 OFST: set 0
1168 ; 286 assert_param(IS_ADC2_EXTTRIG_OK(ADC2_ExtTrigger));
1170 ; 287 assert_param(IS_FUNCTIONALSTATE_OK(NewState));
1172 ; 290 ADC2->CR2 &= (u8)(~ADC2_CR2_EXTSEL);
1174 0129 c65402 ld a,21506
1175 012c a4cf and a,#207
1176 012e c75402 ld 21506,a
1177 ; 292 if (NewState != DISABLE)
1179 0131 9f ld a,xl
1180 0132 4d tnz a
1181 0133 2706 jreq L574
1182 ; 295 ADC2->CR2 |= (u8)(ADC2_CR2_EXTTRIG);
1184 0135 721c5402 bset 21506,#6
1186 0139 2004 jra L774
1187 013b L574:
1188 ; 300 ADC2->CR2 &= (u8)(~ADC2_CR2_EXTTRIG);
1190 013b 721d5402 bres 21506,#6
1191 013f L774:
1192 ; 304 ADC2->CR2 |= (u8)(ADC2_ExtTrigger);
1194 013f c65402 ld a,21506
1195 0142 1a01 or a,(OFST+1,sp)
1196 0144 c75402 ld 21506,a
1197 ; 306 }
1200 0147 85 popw x
1201 0148 81 ret
1225 ; 319 void ADC2_StartConversion(void)
1225 ; 320 {
1226 switch .text
1227 0149 _ADC2_StartConversion:
1231 ; 321 ADC2->CR1 |= ADC2_CR1_ADON;
1233 0149 72105401 bset 21505,#0
1234 ; 322 }
1237 014d 81 ret
1281 ; 332 u16 ADC2_GetConversionValue(void)
1281 ; 333 {
1282 switch .text
1283 014e _ADC2_GetConversionValue:
1285 014e 5205 subw sp,#5
1286 00000005 OFST: set 5
1289 ; 335 u16 temph = 0;
1291 0150 1e04 ldw x,(OFST-1,sp)
1292 ; 336 u8 templ = 0;
1294 0152 7b03 ld a,(OFST-2,sp)
1295 0154 97 ld xl,a
1296 ; 338 if (ADC2->CR2 & ADC2_CR2_ALIGN) /* Right alignment */
1298 0155 c65402 ld a,21506
1299 0158 a508 bcp a,#8
1300 015a 2719 jreq L335
1301 ; 341 templ = ADC2->DRL;
1303 015c c65405 ld a,21509
1304 015f 6b03 ld (OFST-2,sp),a
1305 ; 343 temph = ADC2->DRH;
1307 0161 c65404 ld a,21508
1308 0164 5f clrw x
1309 0165 97 ld xl,a
1310 0166 1f04 ldw (OFST-1,sp),x
1311 ; 345 temph = (u16)(templ | (u16)(temph << (u8)8));
1313 0168 1e04 ldw x,(OFST-1,sp)
1314 016a 4f clr a
1315 016b 02 rlwa x,a
1316 016c 01 rrwa x,a
1317 016d 1a03 or a,(OFST-2,sp)
1318 016f 02 rlwa x,a
1319 0170 1f04 ldw (OFST-1,sp),x
1320 0172 01 rrwa x,a
1322 0173 2021 jra L535
1323 0175 L335:
1324 ; 350 temph = ADC2->DRH;
1326 0175 c65404 ld a,21508
1327 0178 5f clrw x
1328 0179 97 ld xl,a
1329 017a 1f04 ldw (OFST-1,sp),x
1330 ; 352 templ = ADC2->DRL;
1332 017c c65405 ld a,21509
1333 017f 6b03 ld (OFST-2,sp),a
1334 ; 354 temph = (u16)((u16)(templ << (u8)6) | (u16)(temph << (u8)8));
1336 0181 1e04 ldw x,(OFST-1,sp)
1337 0183 4f clr a
1338 0184 02 rlwa x,a
1339 0185 1f01 ldw (OFST-4,sp),x
1340 0187 7b03 ld a,(OFST-2,sp)
1341 0189 97 ld xl,a
1342 018a a640 ld a,#64
1343 018c 42 mul x,a
1344 018d 01 rrwa x,a
1345 018e 1a02 or a,(OFST-3,sp)
1346 0190 01 rrwa x,a
1347 0191 1a01 or a,(OFST-4,sp)
1348 0193 01 rrwa x,a
1349 0194 1f04 ldw (OFST-1,sp),x
1350 0196 L535:
1351 ; 357 return ((u16)temph);
1353 0196 1e04 ldw x,(OFST-1,sp)
1356 0198 5b05 addw sp,#5
1357 019a 81 ret
1401 ; 367 FlagStatus ADC2_GetFlagStatus(void)
1401 ; 368 {
1402 switch .text
1403 019b _ADC2_GetFlagStatus:
1407 ; 370 return ((u8)(ADC2->CSR & ADC2_CSR_EOC));
1409 019b c65400 ld a,21504
1410 019e a480 and a,#128
1413 01a0 81 ret
1436 ; 380 void ADC2_ClearFlag(void)
1436 ; 381 {
1437 switch .text
1438 01a1 _ADC2_ClearFlag:
1442 ; 382 ADC2->CSR &= (u8)(~ADC2_CSR_EOC);
1444 01a1 721f5400 bres 21504,#7
1445 ; 383 }
1448 01a5 81 ret
1472 ; 391 ITStatus ADC2_GetITStatus(void)
1472 ; 392 {
1473 switch .text
1474 01a6 _ADC2_GetITStatus:
1478 ; 393 return ((u8)(ADC2->CSR & ADC2_CSR_EOC));
1480 01a6 c65400 ld a,21504
1481 01a9 a480 and a,#128
1484 01ab 81 ret
1508 ; 402 void ADC2_ClearITPendingBit(void)
1508 ; 403 {
1509 switch .text
1510 01ac _ADC2_ClearITPendingBit:
1514 ; 404 ADC2->CSR &= (u8)(~ADC2_CSR_EOC);
1516 01ac 721f5400 bres 21504,#7
1517 ; 405 }
1520 01b0 81 ret
1533 xdef _ADC2_ClearITPendingBit
1534 xdef _ADC2_GetITStatus
1535 xdef _ADC2_ClearFlag
1536 xdef _ADC2_GetFlagStatus
1537 xdef _ADC2_GetConversionValue
1538 xdef _ADC2_StartConversion
1539 xdef _ADC2_ExternalTriggerConfig
1540 xdef _ADC2_ConversionConfig
1541 xdef _ADC2_SchmittTriggerConfig
1542 xdef _ADC2_PrescalerConfig
1543 xdef _ADC2_ITConfig
1544 xdef _ADC2_Cmd
1545 xdef _ADC2_Init
1546 xdef _ADC2_DeInit
1565 end
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