?? eeprom.lst
字號:
__start:
__text_start:
0013 E5CF LDI R28,0x5F
0014 E0D4 LDI R29,4
0015 BFCD OUT P3D,R28
0016 BFDE OUT P3E,R29
0017 51C0 SUBI R28,0x10
0018 40D0 SBCI R29,0
0019 EA0A LDI R16,0xAA
001A 8308 STD R16,0+Y
001B 2400 CLR R0
001C E6E0 LDI R30,0x60
001D E0F0 LDI R31,0
001E E010 LDI R17,0
001F 36E7 CPI R30,0x67
0020 07F1 CPC R31,R17
0021 F011 BEQ 0x0024
0022 9201 ST R0,Z+
0023 CFFB RJMP 0x001F
0024 8300 STD R16,0+Z
0025 E2E6 LDI R30,0x26
0026 E0F0 LDI R31,0
0027 E6A0 LDI R26,0x60
0028 E0B0 LDI R27,0
0029 E010 LDI R17,0
002A 32E6 CPI R30,0x26
002B 07F1 CPC R31,R17
002C F021 BEQ 0x0031
002D 95C8 LPM
002E 9631 ADIW R30,1
002F 920D ST R0,X+
0030 CFF9 RJMP 0x002A
0031 D0D1 RCALL _main
_exit:
0032 CFFF RJMP _exit
_write164:
ch --> R20
i --> R22
x --> R16
0033 D121 RCALL push_gset2
FILE: .\74164.h
(0001)
(0002) void write164(unsigned char x){
(0003) unsigned char i,ch;
(0004)
(0005) ch = x;
0034 2F40 MOV R20,R16
(0006) PORTB &= ~0x01; // 消隱
0035 98C0 CBI P18,0
(0007) PORTD &= ~0x40; // CLK
0036 9896 CBI P12,6
(0008) for(i=0; i<8; i++){
0037 2766 CLR R22
0038 C00A RJMP 0x0043
(0009) if(ch & 0x80)
0039 FF47 SBRS R20,7
003A C002 RJMP 0x003D
(0010) PORTD |= 0x80;
003B 9A97 SBI P12,7
003C C001 RJMP 0x003E
(0011) else
(0012) PORTD &= ~0x80;
003D 9897 CBI P12,7
(0013) ch <<= 1;
003E 0F44 LSL R20
(0014) PORTD |= 0x40;
003F 9A96 SBI P12,6
(0015) asm("nop");
0040 0000 NOP
(0016) PORTD &= ~0x40;
0041 9896 CBI P12,6
0042 9563 INC R22
0043 3068 CPI R22,0x8
0044 F3A0 BCS 0x0039
(0017) }
(0018) PORTB |= 0x01; // 顯示
0045 9AC0 SBI P18,0
(0019) }
0046 D0F5 RCALL pop_gset2
0047 9508 RET
FILE: D:\job\avrtest\web\example\eeprom\eeprom.c
(0001) //ICC-AVR application builder : 2005-3-1 23:23:33
(0002) // Target : M8
(0003) // Crystal: 8.0000Mhz
(0004)
(0005) #include <iom8v.h>
(0006) #include <macros.h>
(0007) #include <74164.h>
(0008) #include <eeprom.h>
(0009)
(0010) unsigned char display[4]; // 顯示緩沖區
(0011) unsigned char dis; // 當前顯示
(0012) unsigned char s,m; // 時間
(0013)
(0014) //TIMER0 initialisation - prescale:256
(0015) // WGM: Normal
(0016) // desired value: 5mSec
(0017) // actual value: 4.992mSec (0.2%)
(0018) void timer0_init(void)
(0019) {
(0020) TCCR0 = 0x00; //stop
_timer0_init:
0048 2422 CLR R2
0049 BE23 OUT P33,R2
(0021) TCNT0 = 0x64; //set count
004A E684 LDI R24,0x64
004B BF82 OUT P32,R24
(0022) TCCR0 = 0x04; //start timer
004C E084 LDI R24,4
004D BF83 OUT P33,R24
(0023) }
004E 9508 RET
_timer0_ovf_isr:
004F D108 RCALL push_lset
0050 D0ED RCALL push_gset1
(0024)
(0025) #pragma interrupt_handler timer0_ovf_isr:10
(0026) void timer0_ovf_isr(void)
(0027) {
(0028) TCNT0 = 0x64; //reload counter value
0051 E684 LDI R24,0x64
0052 BF82 OUT P32,R24
(0029) // display
(0030) switch(dis){ // 顯示
0053 91400062 LDS R20,_dis
0055 2755 CLR R21
0056 3040 CPI R20,0
0057 0745 CPC R20,R21
0058 F069 BEQ 0x0066
0059 3041 CPI R20,1
005A E0E0 LDI R30,0
005B 075E CPC R21,R30
005C F0A1 BEQ 0x0071
005D 3042 CPI R20,2
005E E0E0 LDI R30,0
005F 075E CPC R21,R30
0060 F0D9 BEQ 0x007C
0061 3043 CPI R20,3
0062 E0E0 LDI R30,0
0063 075E CPC R21,R30
0064 F111 BEQ 0x0087
0065 C02B RJMP 0x0091
(0031) case 0: write164(display[dis] | 0x70); break;
0066 E683 LDI R24,0x63
0067 E090 LDI R25,0
0068 91E00062 LDS R30,_dis
006A 27FF CLR R31
006B 0FE8 ADD R30,R24
006C 1FF9 ADC R31,R25
006D 8100 LDD R16,0+Z
006E 6700 ORI R16,0x70
006F DFC3 RCALL _write164
0070 C020 RJMP 0x0091
(0032) case 1: write164(display[dis] | 0xB0); break;
0071 E683 LDI R24,0x63
0072 E090 LDI R25,0
0073 91E00062 LDS R30,_dis
0075 27FF CLR R31
0076 0FE8 ADD R30,R24
0077 1FF9 ADC R31,R25
0078 8100 LDD R16,0+Z
0079 6B00 ORI R16,0xB0
007A DFB8 RCALL _write164
007B C015 RJMP 0x0091
(0033) case 2: write164(display[dis] | 0xD0); break;
007C E683 LDI R24,0x63
007D E090 LDI R25,0
007E 91E00062 LDS R30,_dis
0080 27FF CLR R31
0081 0FE8 ADD R30,R24
0082 1FF9 ADC R31,R25
0083 8100 LDD R16,0+Z
0084 6D00 ORI R16,0xD0
0085 DFAD RCALL _write164
0086 C00A RJMP 0x0091
(0034) case 3: write164(display[dis] | 0xE0); break;
0087 E683 LDI R24,0x63
0088 E090 LDI R25,0
0089 91E00062 LDS R30,_dis
008B 27FF CLR R31
008C 0FE8 ADD R30,R24
008D 1FF9 ADC R31,R25
008E 8100 LDD R16,0+Z
008F 6E00 ORI R16,0xE0
0090 DFA2 RCALL _write164
(0035) }
(0036) if(++dis > 3) dis = 0;
0091 91800062 LDS R24,_dis
0093 5F8F SUBI R24,0xFF
0094 2E28 MOV R2,R24
0095 92200062 STS _dis,R2
0097 E083 LDI R24,3
0098 1582 CP R24,R2
0099 F418 BCC 0x009D
009A 2422 CLR R2
009B 92200062 STS _dis,R2
(0037) //end display
(0038) }
009D D0A3 RCALL pop_gset1
009E D0D0 RCALL pop_lset
009F 9518 RETI
(0039)
(0040) //TIMER1 initialisation - prescale:1024
(0041) // WGM: 0) Normal, TOP=0xFFFF
(0042) // desired value: 1Hz
(0043) // actual value: 1.000Hz (0.0%)
(0044) void timer1_init(void)
(0045) {
(0046) TCCR1B = 0x00; //stop
_timer1_init:
00A0 2422 CLR R2
00A1 BC2E OUT P2E,R2
(0047) TCNT1H = 0xE1; //setup
00A2 EE81 LDI R24,0xE1
00A3 BD8D OUT P2D,R24
(0048) TCNT1L = 0x7C;
00A4 E78C LDI R24,0x7C
00A5 BD8C OUT P2C,R24
(0049) OCR1AH = 0x1E;
00A6 E18E LDI R24,0x1E
00A7 BD8B OUT P2B,R24
(0050) OCR1AL = 0x84;
00A8 E884 LDI R24,0x84
00A9 BD8A OUT P2A,R24
(0051) OCR1BH = 0x1E;
00AA E18E LDI R24,0x1E
00AB BD89 OUT P29,R24
(0052) OCR1BL = 0x84;
00AC E884 LDI R24,0x84
00AD BD88 OUT P28,R24
(0053) ICR1H = 0x1E;
00AE E18E LDI R24,0x1E
00AF BD87 OUT P27,R24
(0054) ICR1L = 0x84;
00B0 E884 LDI R24,0x84
00B1 BD86 OUT P26,R24
(0055) TCCR1A = 0x00;
00B2 BC2F OUT P2F,R2
(0056) TCCR1B = 0x05; //start Timer
00B3 E085 LDI R24,5
00B4 BD8E OUT P2E,R24
(0057) }
00B5 9508 RET
_timer1_ovf_isr:
00B6 D0A1 RCALL push_lset
(0058)
(0059) #pragma interrupt_handler timer1_ovf_isr:9
(0060) void timer1_ovf_isr(void)
(0061) {
(0062) //TIMER1 has overflowed
(0063) TCNT1H = 0xE1; //reload counter high value
00B7 EE81 LDI R24,0xE1
00B8 BD8D OUT P2D,R24
(0064) TCNT1L = 0x7C; //reload counter low value
00B9 E78C LDI R24,0x7C
00BA BD8C OUT P2C,R24
(0065) if(++s == 60){
00BB 91800061 LDS R24,_s
00BD 5F8F SUBI R24,0xFF
00BE 2E28 MOV R2,R24
00BF 92200061 STS _s,R2
00C1 338C CPI R24,0x3C
00C2 F471 BNE 0x00D1
(0066) s = 0;
00C3 2422 CLR R2
00C4 92200061 STS _s,R2
(0067) if(++m == 60) m = 0;
00C6 91800060 LDS R24,_m
00C8 5F8F SUBI R24,0xFF
00C9 2E28 MOV R2,R24
00CA 92200060 STS _m,R2
00CC 338C CPI R24,0x3C
00CD F419 BNE 0x00D1
00CE 2422 CLR R2
00CF 92200060 STS _m,R2
(0068) }
(0069) EEPROMwrite(1,s); // 保存時間
00D1 91200061 LDS R18,_s
00D3 E001 LDI R16,1
00D4 E010 LDI R17,0
00D5 D0B9 RCALL _EEPROMwrite
(0070) EEPROMwrite(2,m);
00D6 91200060 LDS R18,_m
00D8 E002 LDI R16,2
00D9 E010 LDI R17,0
00DA D0B4 RCALL _EEPROMwrite
(0071) display[0] = s % 10; // 刷新顯示緩沖
00DB E01A LDI R17,0xA
00DC 91000061 LDS R16,_s
00DE D049 RCALL mod8u
00DF 93000063 STS _display,R16
(0072) display[1] = s / 10;
00E1 E01A LDI R17,0xA
00E2 91000061 LDS R16,_s
00E4 D045 RCALL div8u
00E5 93000064 STS _display+1,R16
(0073) display[2] = m % 10;
00E7 E01A LDI R17,0xA
00E8 91000060 LDS R16,_m
00EA D03D RCALL mod8u
00EB 93000065 STS _display+2,R16
(0074) display[3] = m / 10;
00ED E01A LDI R17,0xA
00EE 91000060 LDS R16,_m
00F0 D039 RCALL div8u
00F1 93000066 STS _display+3,R16
(0075) }
00F3 D07B RCALL pop_lset
00F4 9518 RETI
(0076)
(0077) //call this routine to initialise all peripherals
(0078) void init_devices(void)
(0079) {
(0080) //stop errant interrupts until set up
(0081) CLI(); //disable all interrupts
_init_devices:
00F5 94F8 BCLR 7
(0082) DDRB = 0x01; // 初始化操作74LS164的管腳
00F6 E081 LDI R24,1
00F7 BB87 OUT P17,R24
(0083) DDRD = 0xC0; // 初始化操作74LS164的管腳
00F8 EC80 LDI R24,0xC0
00F9 BB81 OUT P11,R24
(0084) timer0_init();
00FA DF4D RCALL _timer0_init
(0085) timer1_init();
00FB DFA4 RCALL _timer1_init
(0086)
(0087) MCUCR = 0x00;
00FC 2422 CLR R2
00FD BE25 OUT P35,R2
(0088) GICR = 0x00;
00FE BE2B OUT P3B,R2
(0089) TIMSK = 0x05; //timer interrupt sources
00FF E085 LDI R24,5
0100 BF89 OUT P39,R24
(0090) SEI(); //re-enable interrupts
0101 9478 BSET 7
(0091) //all peripherals are now initialised
(0092) }
0102 9508 RET
(0093)
(0094) //
(0095) void main(void)
(0096) {
(0097) init_devices();
_main:
0103 DFF1 RCALL _init_devices
(0098) s = EEPROMread(1); // 讀取時間
0104 E001 LDI R16,1
0105 E010 LDI R17,0
0106 D07F RCALL _EEPROMread
0107 93000061 STS _s,R16
(0099) m = EEPROMread(2);
0109 E002 LDI R16,2
010A E010 LDI R17,0
010B D07A RCALL _EEPROMread
010C 93000060 STS _m,R16
(0100) display[0] = s % 10; // 刷新顯示緩沖
010E E01A LDI R17,0xA
010F 91000061 LDS R16,_s
0111 D016 RCALL mod8u
0112 93000063 STS _display,R16
(0101) display[1] = s / 10;
0114 E01A LDI R17,0xA
0115 91000061 LDS R16,_s
0117 D012 RCALL div8u
0118 93000064 STS _display+1,R16
(0102) display[2] = m % 10;
011A E01A LDI R17,0xA
011B 91000060 LDS R16,_m
011D D00A RCALL mod8u
011E 93000065 STS _display+2,R16
(0103) display[3] = m / 10;
0120 E01A LDI R17,0xA
0121 91000060 LDS R16,_m
0123 D006 RCALL div8u
0124 93000066 STS _display+3,R16
(0104) while(1);
0126 CFFF RJMP 0x0126
(0105) }
FILE: <library>
0127 9508 RET
mod8u:
0128 9468 BSET 6
0129 C001 RJMP xdiv8u
div8u:
012A 94E8 BCLR 6
xdiv8u:
012B 932A ST R18,-Y
012C 92FA ST R15,-Y
012D 24FF CLR R15
012E E028 LDI R18,0x8
012F 0F00 LSL R16
0130 1CFF ROL R15
0131 16F1 CP R15,R17
0132 F010 BCS 0x0135
0133 1AF1 SUB R15,R17
0134 9503 INC R16
0135 952A DEC R18
0136 F7C1 BNE 0x012F
0137 F40E BRTC 0x0139
0138 2D0F MOV R16,R15
0139 90F9 LD R15,Y+
013A 9129 LD R18,Y+
013B 9508 RET
pop_gset2:
013C E0E2 LDI R30,2
013D C004 RJMP pop
push_gset1:
013E 935A ST R21,-Y
013F 934A ST R20,-Y
0140 9508 RET
pop_gset1:
0141 E0E1 LDI R30,1
pop:
0142 9149 LD R20,Y+
0143 9159 LD R21,Y+
0144 FDE0 SBRC R30,0
0145 9508 RET
0146 9169 LD R22,Y+
0147 9179 LD R23,Y+
0148 FDE1 SBRC R30,1
0149 9508 RET
014A 90A9 LD R10,Y+
014B 90B9 LD R11,Y+
014C FDE2 SBRC R30,2
014D 9508 RET
014E 90C9 LD R12,Y+
014F 90D9 LD R13,Y+
0150 FDE3 SBRC R30,3
0151 9508 RET
0152 90E9 LD R14,Y+
0153 90F9 LD R15,Y+
0154 9508 RET
push_gset2:
0155 937A ST R23,-Y
0156 936A ST R22,-Y
0157 CFE6 RJMP push_gset1
push_lset:
0158 93FA ST R31,-Y
0159 93EA ST R30,-Y
015A 93BA ST R27,-Y
015B 93AA ST R26,-Y
015C 939A ST R25,-Y
015D 938A ST R24,-Y
015E 933A ST R19,-Y
015F 932A ST R18,-Y
0160 931A ST R17,-Y
0161 930A ST R16,-Y
0162 929A ST R9,-Y
0163 928A ST R8,-Y
0164 927A ST R7,-Y
0165 926A ST R6,-Y
0166 925A ST R5,-Y
0167 924A ST R4,-Y
0168 923A ST R3,-Y
0169 922A ST R2,-Y
016A 921A ST R1,-Y
016B 920A ST R0,-Y
016C B60F IN R0,P3F
016D 920A ST R0,-Y
016E 9508 RET
pop_lset:
016F 9009 LD R0,Y+
0170 BE0F OUT P3F,R0
0171 9009 LD R0,Y+
0172 9019 LD R1,Y+
0173 9029 LD R2,Y+
0174 9039 LD R3,Y+
0175 9049 LD R4,Y+
0176 9059 LD R5,Y+
0177 9069 LD R6,Y+
0178 9079 LD R7,Y+
0179 9089 LD R8,Y+
017A 9099 LD R9,Y+
017B 9109 LD R16,Y+
017C 9119 LD R17,Y+
017D 9129 LD R18,Y+
017E 9139 LD R19,Y+
017F 9189 LD R24,Y+
0180 9199 LD R25,Y+
0181 91A9 LD R26,Y+
0182 91B9 LD R27,Y+
0183 91E9 LD R30,Y+
0184 91F9 LD R31,Y+
0185 9508 RET
_EEPROMread:
0186 99E1 SBIC P1C,1
0187 CFFE RJMP _EEPROMread
0188 9310003F STS 0x3F,R17
018A 9300003E STS 0x3E,R16
018C 9AE0 SBI P1C,0
018D B30D IN R16,P1D
018E 9508 RET
_EEPROMwrite:
018F DFAE RCALL push_gset1
0190 99E1 SBIC P1C,1
0191 CFFE RJMP 0x0190
0192 9310003F STS 0x3F,R17
0194 9300003E STS 0x3E,R16
0196 BB2D OUT P1D,R18
0197 B74F IN R20,P3F
0198 94F8 BCLR 7
0199 9AE2 SBI P1C,2
019A 9AE1 SBI P1C,1
019B BF4F OUT P3F,R20
019C 2700 CLR R16
019D 2711 CLR R17
019E DFA2 RCALL pop_gset1
019F 9508 RET
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