/* *  Copyright (C) 2004 Tobias Lorenz * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. *//* EmbeddedICE macrocell programming */#include <stdio.h>#include <stdlib.h>#include "jtag.h"#include "ice.h"#include "debug.h"#include "lpec.h"const unsigned int ICE_sizes[32] = {    4, 5, 8,			// DCR, DSR, VCCR    0,    6, 32,			// DCCR, DCDR    0, 0,    32, 32, 32, 32, 9, 8,	// WP 0: AV, AM, DV, DM, CV, CM    0, 0,    32, 32, 32, 32, 9, 8,	// WP 1: AV, AM, DV, DM, CV, CM    0, 0,    0, 0, 0, 0, 0, 0, 0, 0};unsigned long ice_register(unsigned long addr, unsigned long data, unsigned char write){    unsigned long Data[2];    // Go to scan chain 2    sc_select(SC_EmbeddedICE_macrocell_programming);    // read/write data    Data[0] = data;		// 32 bits    Data[1] = addr;		//  5 bits    Data[1] |= (write << 5);	//  1 bit  ==> 38 bits    jtag_instruction(JTAG_INTEST, Data, SC_sizes[SC_EmbeddedICE_macrocell_programming]);    // return data    return Data[0] & ((1<<ICE_sizes[addr]) - 1);}void ice_show_status(void){    unsigned long debug_control;    unsigned long debug_status;        debug_control = ice_register(ICE_Debug_control, 0, 0);    debug_status  = ice_register(ICE_Debug_status , 0, 0);    if (debug_control) {	printf("debug control is %4.4X ", debug_control);	if (debug_control & ICE_DCR_DBGACK     ) printf("(debug acknowledge)");	if (debug_control & ICE_DCR_DBGRQ      ) printf("(debug request)");	if (debug_control & ICE_DCR_INTDIS     ) printf("(interrupt disable)");	if (debug_control & ICE_DCR_Single_step) printf("(single stepping)");	printf("\n");    }        if (debug_status) {	printf("debug status is %5.5X ", debug_status);	if (debug_status & ICE_DSR_DBGACK ) printf("(debug acknowledge)");	if (debug_status & ICE_DSR_DBGRQ  ) printf("(debug request)");	if (debug_status & ICE_DSR_IFEN   ) printf("(interrupt enable)");	if (debug_status & ICE_DSR_SYSCOMP) printf("(system complete)");	if (debug_status & ICE_DSR_ITBIT  ) printf("(instruction thumb bit)");	printf("\n");    }}int ice_halted(void){    ice_show_status();    return ((ice_register(ICE_Debug_status, 0, 0) & ICE_DSR_Halted) == ICE_DSR_Halted);}void ice_dcc_write(long value){    while (ice_register(ICE_Debug_comms_control, 0, 0) & ICE_DCCR_Read) {	usleep(100);    }    ice_register(ICE_Debug_comms_data, value, 1);}long ice_dcc_read(long value){    while ( !(ice_register(ICE_Debug_comms_control, 0, 0) & ICE_DCCR_Write )) {	usleep(100);    }        return ice_register(ICE_Debug_comms_data, 0, 0);}void ice_set_hardware_breakpoint(char nr, unsigned long addr, unsigned long mask){    printf("Activating hardware breakpoint %i at 0x%8.8x with mask 0x%8.8x\n", nr, addr, mask);    switch(nr) {	case 0:	    // set address	    ice_register(ICE_WP_0_address_value, addr, 1);	    ice_register(ICE_WP_0_address_mask , mask, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_0_data_value, 0         , 1);	    ice_register(ICE_WP_0_data_mask , 0xFFFFFFFF, 1);	    // nOPC=0	    ice_register(ICE_WP_0_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_0_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	case 1:	    // set address	    ice_register(ICE_WP_1_address_value, addr, 1);	    ice_register(ICE_WP_1_address_mask , mask, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_1_data_value, 0         , 1);	    ice_register(ICE_WP_1_data_mask , 0xFFFFFFFF, 1);	    // nOPC=0	    ice_register(ICE_WP_1_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_1_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	default:	    printf("(ice_set_hardware_breakpoint) Breakpoint not available.\n");    }}void ice_set_software_breakpoint(char nr, unsigned long pattern){    printf("Activating software breakpoint %i with pattern 0x%8.8x\n", nr, pattern);    switch(nr) {	case 0:	    // set address	    ice_register(ICE_WP_0_address_value, 0         , 1);	    ice_register(ICE_WP_0_address_mask , 0xFFFFFFFF, 1);	    // no data-dependent breakpoint    	    ice_register(ICE_WP_0_data_value, pattern   , 1);	    ice_register(ICE_WP_0_data_mask , 0         , 1);	    // nOPC=0	    ice_register(ICE_WP_0_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_0_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	case 1:	    // set address	    ice_register(ICE_WP_1_address_value, 0         , 1);	    ice_register(ICE_WP_1_address_mask , 0xFFFFFFFF, 1);	    // no data-dependent breakpoint    	    ice_register(ICE_WP_1_data_value, pattern, 1);	    ice_register(ICE_WP_1_data_mask , 0      , 1);	    // nOPC=0	    ice_register(ICE_WP_1_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_1_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	default:	    printf("(ice_set_software_breakpoint) Breakpoint not available.\n");    }}void ice_set_hardware_watchpoint(char nr, unsigned long addr, unsigned long mask){    switch(nr) {	case 0:	    // set address	    ice_register(ICE_WP_0_address_value, 0         , 1);	    ice_register(ICE_WP_0_address_mask , 0xFFFFFFFF, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_0_data_value, addr, 1);	    ice_register(ICE_WP_0_data_mask , mask, 1);	    // nOPC=1	    ice_register(ICE_WP_0_control_value, ICE_CR_nOPC | ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_0_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	case 1:	    // set address	    ice_register(ICE_WP_1_address_value, 0         , 1);	    ice_register(ICE_WP_1_address_mask , 0xFFFFFFFF, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_1_data_value, addr, 1);	    ice_register(ICE_WP_1_data_mask , mask, 1);	    // nOPC=1	    ice_register(ICE_WP_1_control_value, ICE_CR_nOPC | ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_1_control_mask, ICE_CR_All & ~(ICE_CR_nOPC), 1);	    break;	default:	    printf("(ice_set_hardware_watchpoint) Watchpoint not available.\n");    }}void ice_enable_wp(char nr){    unsigned long control_value;        switch(nr) {	case 0:	    control_value = ice_register(ICE_WP_0_control_value, 0, 0);	    control_value |= ICE_CR_ENABLE;	    ice_register(ICE_WP_0_control_value, control_value, 1);	    break;	case 1:	    control_value = ice_register(ICE_WP_1_control_value, 0, 0);	    control_value |= ICE_CR_ENABLE;	    ice_register(ICE_WP_1_control_value, control_value, 1);	    break;	default:	    printf("(ice_enable_wp) Breakpoint not available.\n");    }}void ice_disable_wp(char nr){    unsigned long control_value;        switch(nr) {	case 0:	    control_value = ice_register(ICE_WP_0_control_value, 0, 0);	    control_value &= ~ICE_CR_ENABLE;	    ice_register(ICE_WP_0_control_value, control_value, 1);	    break;	case 1:	    control_value = ice_register(ICE_WP_1_control_value, 0, 0);	    control_value &= ~ICE_CR_ENABLE;	    ice_register(ICE_WP_1_control_value, control_value, 1);	    break;	default:	    printf("(ice_disable_wp) Breakpoint not available.\n");    }}int ice_wp_enabled(char nr){    switch(nr) {	case 0:	    return((ice_register(ICE_WP_0_control_value, 0, 0) & ICE_CR_ENABLE) == ICE_CR_ENABLE);	    break;	case 1:	    return((ice_register(ICE_WP_1_control_value, 0, 0) & ICE_CR_ENABLE) == ICE_CR_ENABLE);	    break;	default:	    printf("(ice_wp_enabled) Breakpoint not available.\n");    }    return(0);}unsigned long ice_get_breakpoint_addr(char nr){    switch(nr) {	case 0:	    return(ice_register(ICE_WP_0_address_value, 0, 0));	    break;	case 1:	    return(ice_register(ICE_WP_1_address_value, 0, 0));	    break;	default:	    printf("(ice_get_breakpoint_addr) Breakpoint not available.\n");    }    return(0);}unsigned long ice_get_watchpoint_addr(char nr){    switch(nr) {	case 0:	    return(ice_register(ICE_WP_0_data_value, 0, 0));	    break;	case 1:	    return(ice_register(ICE_WP_1_data_value, 0, 0));	    break;	default:	    printf("(ice_get_watchpoint_addr) Breakpoint not available.\n");    }    return(0);}void ice_set_hardware_bp_mask(char nr, unsigned long addr, unsigned long mask){    switch(nr) {	case 0:	    // set address	    ice_register(ICE_WP_0_address_value, addr, 1);	    ice_register(ICE_WP_0_address_mask , mask, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_0_data_value, 0         , 1);	    ice_register(ICE_WP_0_data_mask , 0xFFFFFFFF, 1);	    // nOPC=0	    ice_register(ICE_WP_0_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_0_control_mask, ICE_CR_All & ~(ICE_CR_nOPC|ICE_CR_ENABLE), 1);	    break;	case 1:	    // set address	    ice_register(ICE_WP_1_address_value, addr, 1);	    ice_register(ICE_WP_1_address_mask , mask, 1);	// 0b01 for thumb, 0b11 for arm	    // no data-dependent breakpoint    	    ice_register(ICE_WP_1_data_value, 0         , 1);	    ice_register(ICE_WP_1_data_mask , 0xFFFFFFFF, 1);	    // nOPC=0	    ice_register(ICE_WP_1_control_value, ICE_CR_ENABLE, 1);	    ice_register(ICE_WP_1_control_mask, ICE_CR_All & ~(ICE_CR_nOPC|ICE_CR_ENABLE), 1);	    break;	default:	    printf("(ice_set_hardware_bp_mask) Breakpoint not available.\n");    }}