;**************************************************************************
;*
;* Title		: PSC1 init code in 1 ramp mode
;* Version		: 1.0
;* Last updated	:  
;* Target		: AT90PWM3
;*
;* DESCRIPTION  : Start PSC1 in 1 ramp mode using PLL
;*
;**************************************************************************

.include "pwm3def.inc"


;***** Global register variables

.def	temp	=R16			; working register

 

;$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
;$
;$  	PROGRAM START - EXECUTION STARTS HERE
;$
;$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

.cseg

;****** Interrupt Table

	.org	0x0000
	rjmp		RESET		; Reset (Handle)





   .org     0x0030
;*************************************************************************************************
;*
;*		MAIN PROGRAM
;*
;*************************************************************************************************

RESET:
  ser temp                // Port configuration
  out DDRE,temp
  ser temp
  out PORTE,temp
 

  clr temp                // on time and dead time Values
  sts OCR1SAH,temp
  clr temp 
  sts OCR1SAL,temp 

  ldi temp, 0x05
  sts OCR1RAH,temp
  clr temp 
  sts OCR1RAL,temp 

  ldi temp, 0x07
  sts OCR1SBH, temp
  ldi temp, 0x80
  sts OCR1SBL, temp 

  ldi temp, 0x0F
  sts OCR1RBH, temp 
  ldi temp, 0xFF
  sts OCR1RBL, temp 

  ldi temp, 0x06
  out PLLCSR, temp           // Start the PLL at 64MHz

WAITPLLREADY:
  in  temp,PLLCSR           //  Wait_pll_ready  
  andi temp,0x01
  cpi  temp,0X01
  brne WAITPLLREADY
  

  ldi temp, 0x06
  sts  PCNF1,temp         // Psc1_use_pll_clock & Psc0_outputs_active_high  
                          //  Psc1_in_1_ramp_mode     



  ldi temp, 0x05
  sts  PSOC1,temp         // Enable_both_psc1_outputs()  

 
  ldi temp, 0x01
  sts PCTL1,temp          // start psc
    






;-------------------------------
; Main loop
LOOP:
    ldi temp, 0xFF
	out PINE,temp          // it's alive
	rjmp	LOOP