//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : jtag.h
//* Object              : Jtag Definition File.
//*
//* 1.0 27/02/02 NL    : Creation
//*----------------------------------------------------------------------------

#ifndef arm7tdmi_h
#define arm7tdmi_h

// ARM7DTMI defualt ID
#define CORE_IDCODE		0x1F0F0F0F

//
#define NO_IDLE		0
#define IDLE		1

//* Defines JTAG Instructions
#define EXTEST		0x0
#define SCAN_N		0x2
#define INTEST		0xC
#define IDCODE		0xE
#define BYPASS		0xF
#define CLAMP		0x5
#define HIGHZ		0x7
#define CLAMPZ		0x9
#define RESTART		0x4

//* Defines the JTAG Scan Chains
#define MACROCELL	0x0
#define DEBUG		0x1
#define ICE_BREAKER	0x2
#define EXTERNAL	0x3

//* Defines the different units in the ICEBreaker Module
#define ICE_DBG_CTRL		0x00
#define ICE_DBG_STS			0x01 
#define ICE_DBG_COM_CTRL	0x04
#define ICE_DBG_COM_DATA	0x05
#define ICE_WTP0_ADDR_VAL	0x08
#define ICE_WTP0_ADDR_MASK	0x09
#define ICE_WTP0_DATA_VAL	0x0A
#define ICE_WTP0_DATA_MASK	0x0B
#define ICE_WTP0_CTRL_VAL	0x0C
#define ICE_WTP0_CTRL_MASK	0x0D
#define ICE_WTP1_ADDR_VAL	0x10
#define ICE_WTP1_ADDR_MASK	0x11
#define ICE_WTP1_DATA_VAL	0x12
#define ICE_WTP1_DATA_MASK	0x13
#define ICE_WTP1_CTRL_VAL	0x14
#define ICE_WTP1_CTRL_MASK	0x15

//* Defines the mask associated to the registers
#define ICE_DBG_STS_MASK	0x0000001F		//* width = 5 bits


#define	READ_DEBUG_STATUS_MASK	0x9

//* Define registers
#define R0			0x0
#define R1			0x1
#define R2			0x2
#define R3			0x3
#define R4			0x4
#define R5			0x5
#define R6			0x6
#define R7			0x7
#define R8			0x8
#define R9			0x9
#define R10			0xA
#define R11			0xB
#define R12			0xC
#define SP			0xD
#define LR			0xE
#define PC			0xF

//* Define instructions
#define NOP					0xE1A00000
#define READ_REG			0xE58E0000
#define WRITE_REG			0xE59E0000
#define READ_MEM			0xE4901000
#define	READ_MEM_HALFWORD	0xE0D010B0
#define WRITE_MEM			0xE4801000
#define WRITE_MEM_HALFWORD	0xE1C010B0
#define STM					0xE88E0000 //* or 0xE8AE0000
#define LDM					0xE89E0000
#define LDMIA_R0_R0_R1		0xE8900003
#define READ_CPSR			0xE10F0000
#define WRITE_CPSR  		0xE12FF000 
#define BRANCH_PC_5 		0xEAFFFFFB
#define BRANCH_PC	 		0xEAFFFFFF

//* Size of Words to write
#define	WORD		0
#define	HALFWORD	1

void JTAG_Select_Scan_Chain(unsigned int sc);
unsigned int JTAG_Read_Debug_Status(void);
unsigned int JTAG_Test_Is_Breaked(unsigned int value);
void JTAG_Read_Memory(unsigned int address, unsigned int *value, unsigned int halfword);
void JTAG_Write_Memory(unsigned int address, unsigned int value, unsigned int halfword);
unsigned int JTAG_Stop(void);
void JTAG_Write_ICEBreaker(unsigned int address, unsigned int data);
void JTAG_Read_ICEBreaker(unsigned int address, unsigned int *data);
unsigned int Read_ID_Code(void);
void Reset(void);
void JTAG_Go(unsigned int *context);

#endif /* jtag_h */