;============================================================================
; File Name:	Hall3drv.asm
;
; Module Name: 	HALL3_DRV				      
;
; Initialization Routine: HALL3_DRV_INIT
;
; Originator:	Digital Control Systems Group
;				Texas Instruments
;
; Description:	Controls switching state of Inverter driving a BLDC motor 	
;
;			|~~~~~~~~~~~~~~~|
;   hall_map_ptro------>|		|----->o  cmtn_trig_hall 
;			| HALL3_DRV	|
;			|		|
;			|_______________|
;
;
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000	Release	Rev 1.0
;===========================================================================
;(To use this Module, copy this section to main system file)
;		.ref	HALL3_DRV, HALL3_DRV_INIT			;function call
;		.ref	cmtn_trig_hall, hall_map_ptr
;===========================================================================
;Module definitions for external reference.
		.def	HALL3_DRV, HALL3_DRV_INIT			;function call
		.def	cmtn_trig_hall, hall_map_ptr
;===========================================================================
		.include	"x24x_app.h" 
		                
hall_vars   		.usect	"HALL_VAR",20,1
cmtn_trig_hall		.set	hall_vars+1   	;Output trigger for Mod6cnt input
cap_cntr			.set	hall_vars+2     ;Running count of detected edges on CAP1,2,3                                                 
debounce_CNT 		.set	hall_vars+3     ;Counter/debounce delay current value 
debounce_amount 	.set	hall_vars+4     ;Counter delay amount to validate/debounce GPIO readings
hall_GPIO			.set	hall_vars+5     ;Most recent logic level on CAP/GPIO
hall_GPIO_buf 		.set	hall_vars+6     ;Buffer of last logic level on CAP/GPIO while being debounced
hall_GPIO_accepted 	.set	hall_vars+7     ;Debounced logic level on CAP/GPIO
edge_debounced		.set	hall_vars+8     ;Trigger from Debounce function to Hall_Drv, if =1 edge is debounced 
hall_map1			.set	hall_vars+9     ;CAP/GPIO logic levels for hall_map_ptr = 0
hall_map2			.set	hall_vars+10    ;CAP/GPIO logic levels for hall_map_ptr = 1
hall_map3			.set	hall_vars+11    ;CAP/GPIO logic levels for hall_map_ptr = 2 
hall_map4			.set	hall_vars+12    ;CAP/GPIO logic levels for hall_map_ptr = 3
hall_map5			.set	hall_vars+13    ;CAP/GPIO logic levels for hall_map_ptr = 4
hall_map6			.set	hall_vars+14    ;CAP/GPIO logic levels for hall_map_ptr = 5
evifrc			    .set	hall_vars+15    ;CAP flags, indicating which CAP detected the edge
stall_cntr		    .set	hall_vars+16    ;If motor stalls, this counters overflow triggers commutation to start 
											; rotation.  Rotation is defined as an edge detection of a hall signal.
hall_GPR0		    .set	hall_vars+17    ;General purpose register
hall_map_ptr		.set	hall_vars+18    ;During hall map creation, this variable points to the current commutation
											;state.  After map creation, it points to the next commutation state.
revolutions			.set	hall_vars+19    ;Running counter, with a revolution defined as 1-cycle of the 6 hall states
 
          
		.text
HALL3_DRV_INIT:   
	CALL	Determine_State               	;Read CAP/GPIO logic levels
	LDP		#hall_vars
	BLDD	#hall_GPIO, hall_GPIO_buf       ;Init with current CAP/GPIO logic levels
	BLDD	#hall_GPIO, hall_GPIO_accepted  ;Init with current CAP/GPIO logic levels
	SPLK	#0, 	cmtn_trig_hall         	;No commutation trigger
	SPLK	#0, 	debounce_CNT            ;Reset CAP/GPIO debounce counter and amount, used on all detected edges
   	SPLK	#10, 	debounce_amount    
   	SPLK	#0, 	edge_debounced          ;Reset debounced edge trigger
	SPLK	#0FFFFh,stall_cntr              ;Set stall counter to starting amount, it will count down by 1 on every system 
	                                        ;ISR that a hall signal has not been detected.
	SPLK	#0, 	cap_cntr                ;Reset running counter that totals edges detected on all 3 CAP inputs
	SPLK	#-10, 	revolutions             ;While <=0 hall map is created.  Once it's >0, the hall map is used to 
											;obtain the correct commutation pointer.
		
   	       
	
	; Initialise Event Manager        
	;--------------------------

	;Configure GPT2
		POINT_EV				
	;Configure CAPCON
		SPLK	#0, CAPCON
		SPLK	#0, CAPCON			;Clear CAP Regs
		SPLK	#1011000011111100b, CAPCON
				;5432109876543210         
				; 15:	1	- don't clear capture registers
				; 13:	01	- enable Capture 1,2 disable QEP
				; 12:	1 	- enable Capture 3
				; 11:	0 	- reserved
				; 10:	0 	- Use GPTimer 2 for CAP3
				; 9:	0 	- Use GPTimer 2 for CAP1,2
				; 8:	0 	- No ADC start on CAP3 interrupt
				; 6:	11 	- CAP1, detect both edges
				; 4:	11 	- CAP2, detect both edges
				; 2:	11 	- CAP3, detect both edges
				; 0:	00 	- reserved 
		SPLK	#1500h, CAPFIFO
 
	.if (x240)	;target dependancy
	;Configure CAP1-3 as CAPTURE inputs 
		LDP		#OCRB>>7			
		LACC	OCRB
		OR	#0000000001110000b
			;||||!!!!||||!!!!
			;5432109876543210
		SACL	OCRB 				;OCRB.4-6 = CAP1-3
		
	;Configure CAP1-3 as GPIO-inputs (IOPC4-6)
		LACC	PCDATDIR			
		AND	#1000111111111111b		
			;||||!!!!||||!!!!
			;5432109876543210
		SACL	PCDATDIR			;PCDATDIR.12-14 (IOPC4-6 Data Direction as input)
	.endif

	.if (x243|x2407)	;target dependancy

	;Configure CAP1-3 as CAPTURE inputs 
		LDP		#OCRA>>7			
		LACC	OCRA
		OR	#0000000000111000b
			;||||!!!!||||!!!!
			;5432109876543210
		SACL	OCRA 				;OCRA.3-5 = CAP1-3
		
	;Configure CAP1-3 as GPIO-inputs (IOPA3-5)
		LACC	PADATDIR			
		AND	#1100011111111111b
			;||||!!!!||||!!!!
			;5432109876543210
		SACL	PADATDIR			;PADATDIR.11-13 (IOPC3-5 Data Direction as input)
	.endif                                                                                                                                    		
				
		RET
 		

;**** Function:  HALL3_DRV  ****

HALL3_DRV:	
		LDP		#EVIFRC>>7          
		LACC	EVIFRC
		BCND	EDGE_DETECTED,NEQ	;Any hall signal edges detected?
		
NO_EDGE_DETECTED:
		LDP		#hall_vars         	                         
		SPLK	#0, cmtn_trig_hall	;Reset trigger, it only handshakes with calling program.			                             
		LACC	edge_debounced    	;If motor has not moved then debounce current position. 
		CC		HALL_DEBOUNCE, EQ
		BLDD	#edge_debounced,cmtn_trig_hall	;If current position is debounced, then trigger
		 										;move to next position.
		LACC	edge_debounced
		CC		Next_State_Ptr, NEQ	;If current position is debounced, find match in table 
									;and return pointer to current state.  Ptr to be incremented
									;by MOD6CNT after RET.		 										
		SPLK	#0, edge_debounced	;Reset trigger	 										
		B		HALL_RET

EDGE_DETECTED:
		LDP		#hall_vars         
		SACL	evifrc             	;Save capture flag register, convenient for Watch Window
		SPLK	#0FFFFh, stall_cntr ;On new edge, reset stall counter
		LDP		#EVIFRC>>7
		SPLK	#07h, EVIFRC		;Clear all CAP Int-flags 					
		CALL	Determine_State     ;Since motor has moved, determine state (read hall_GPIO).				
		LDP 	#hall_vars
		LACC	cap_cntr			;Increment running edge detection counter
		ADD		#1          
		SACL	cap_cntr    	

HALL_RET:                 
        RET



;**** Function:  HALL_DEBOUNCE  ****       

HALL_DEBOUNCE:
		LDP		#hall_vars                                   
		LACC	hall_GPIO        	;Current GPIO reading == debounced GPIO reading?
		SUB		hall_GPIO_accepted  ;If no, then the motor has moved to a new position.
		BCND	GPIO_CHANGED, NEQ 
		
GPIO_UNCHANGED:		
		LACC	revolutions,16      ;Only create hall map during initial revolutions
		CC		CREATE_MAP, LEQ				
		LACC	stall_cntr          ;Decrement stall counter.
		SUB		#1
		SACL	stall_cntr
		BCND	END, NEQ		
		SPLK	#1, edge_debounced	;If motor has stalled, then user trigger to commutate
		SPLK	#0FFFFh, stall_cntr ;Reset counter to starting value			 		
		B		END
				
GPIO_CHANGED:
		LACC	hall_GPIO     		;Current GPIO reading == previous GPIO reading? 		
		SUB		hall_GPIO_buf
		BCND	NEW_READING, NEQ 		
		LACC	debounce_CNT,16		;If equal, is current GPIO reading debounced?
		SUB		debounce_amount,16
		BCND	DEBOUNCE_MORE, LT   
		BLDD	#hall_GPIO_buf, hall_GPIO_accepted	;Current GPIO reading is now debounced
		SPLK	#1, edge_debounced	;Edge/position debounced, trigger commutation
		SPLK	#0, debounce_CNT    ;Reset debounce counter
		LACC	hall_map_ptr    	
		BCND	END, NEQ		
		LACC	revolutions			;Increment on every rev (hall_map_ptr = 0)
		ADD		#1
		SACL	revolutions 		
		B		END
		 		
DEBOUNCE_MORE:
		LACC	debounce_CNT		;Increment debounce counter
		ADD		#1
		SACL	debounce_CNT
		B		END  
		
NEW_READING:
		BLDD	#hall_GPIO, hall_GPIO_buf 	;Save new reading and reset debounce counter
		SPLK	#0, debounce_CNT
		B		END
		
END:	RET			
       
       
;**** Function:  CREATE_MAP  ****
  
CREATE_MAP:
		LDP		#hall_vars
		LACC	hall_map_ptr	
		ADD		#hall_map1      ;Add base address of table to pointer offset.    	
		SACL	hall_GPR0
		LAR		AR2, hall_GPR0
		MAR		*, AR2
		BLDD	#hall_GPIO_accepted, *	;Save debounced GPIO to table.
		
		RET  
       
       
;**** Function:  Next_State_Ptr  ****

Next_State_Ptr:      
        LACC	revolutions,16	;Only run function after map has been created.
        RETC	LEQ		
		LAR		AR3, #5   	
		LAR		AR2, #hall_map1
		MAR		*, AR2
Next_State:		             	;Search for a match of current debounced GPIO position
		LACC	*+, AR3         ;and the table entries.
		SUB		hall_GPIO_accepted
		BCND	Match_Found, EQ
		BANZ    Next_State, AR2
		
Match_Found:
		LACC	#5            	;On match, save pointer position.  Pointer will be incremented	
		SAR		AR3, hall_GPR0  ;by 1 since MOD6CNT will receive a positive trigger
		SUB		hall_GPR0       ;and pointer as inputs.
		SACL	hall_map_ptr	
							
		RET



;**** Function:  Determine_State  ****       

Determine_State: 
 
	.if (x240)	;target dependancy

	;Configure CAP1-3 as GPIO-inputs (IOPC4-6)
		LDP		#OCRB>>7			
		LACC	OCRB
		AND		#1111111110001111b 		
				;5432109876543210
		SACL	OCRB					;OCRB.4-6 = IOPC4-6
                                                                                          
	;Read input levels on CAP1-3/IOPC4-6
		LACC	PCDATDIR,11				;ACC.15-17 = PCDATDIR.4-6 (IOPC4-6)
		AND		#0000000000000111b,15 
				;5432109876543210
		LDP		#hall_vars                                   
		SACH	hall_GPIO,1  			;hall_GPIO.0-2 = IOPC4-6  
                                                                                          
	;Configure CAP1-3 as CAPTURE inputs 
		LDP		#OCRB>>7			
		LACC	OCRB
		OR		#0000000001110000b		
				;5432109876543210
		SACL	OCRB
	.endif								;OCRB.4-6 = CAP1-3



	.if (x243|x2407)	;target dependancy


	;Configure CAP1-3 as GPIO-inputs (IOPA3-5)
		LDP		#OCRA>>7			
		LACC	OCRA
		AND		#1111111111000111b		
				;5432109876543210
		SACL	OCRA					;OCRA.3-5 = IOPA3-5
                                                                                          
	;Read input levels on CAP1-3 (IOPA3-5)
		LACC	PADATDIR,12				;ACC.15-17 = PADATDIR.3-5 (IOPA3-5)
		AND		#0000000000000111b,15 
				;5432109876543210
		LDP		#hall_vars                                   
		SACH	hall_GPIO,1  			;hall_GPIO.0-2 = IOPA3-5   
                                                                                          
	;Configure CAP1-3 as CAPTURE inputs 
		LDP		#OCRA>>7			
		LACC	OCRA
		OR		#0000000000111000b		
				;5432109876543210
		SACL	OCRA					;OCRA.3-5 = CAP1-3
	.endif

		RET