?? f243bldcpwm2.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f243bldcpwm2.asm -o ..\obj\f243bldcpwm2.obj -l ..\temp\f243bldcpwm2.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:44 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243bldcpwm2.asm PAGE 1
1 ;===============================================================================================================
2 ; File name: F243BLDCPWM2.ASM
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ; Description:
7 ; This file contains source for the Full Compare PWM drivers for the F243
8 ; Applicability of these functions is indicated in the Table 1
9 ;=====================================================================================
10 ; History:
11 ;-------------------------------------------------------------------------------------
12 ; 9-15-2000 Release Rev 1.0
13 ;================================================================================
14 ; T A B L E 1
15 ;================================================================================
16 ; Function Name | Applicability
17 ;================================================================================
18 ; | F240 | F241| F243 | LF2402 | LF2406 | LF2407
19 ; | | | | | |
20 ; F243_BLDC_PWM_Update | Y | Y | Y | | |
21 ;================================================================================
22 ;================================================================================
23 ; Routine Name: PWM Update Routine Routine Type: C Callable
24 ;
25 ; Description:
26 ;
27 ; C prototype : int F243_BLDC_PWM_Update(PWMGEN *p)
28 ;================================================================================
29 ; History: Created August 22, 2000
30 ;
31 ; Definition of the argument structure.
32 ; typedef struct {
33 ; int cmtn_ptr_bd;
34 ; int mfunc_p ;
35 ; int period_max;
36 ; int d_func ;
37 ; int (*init)();
38 ; int (*update)();
39 ; } PWMGEN;
40 ;
41 ;================================================================================
42
43 .include ..\include\x24x.h
44
45 POINT_EV .macro
46 LDP #0E8h
47 .endm
48
49
50 0001 ACTIVE_HI .set 1 ;Select ACTIVE_HI or ACTIVE_LO by setting
51 0000 ACTIVE_LO .set 0 ;the corresponding parameter to 1. Set the other
52 ;parameter to 0.
53
54 ;This setting depends on Power devices. ACTIVE_HI implies the power device turns
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:44 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243bldcpwm2.asm PAGE 2
55 ;ON with a HIGH gate signal. ACTIVE_LO implies the power device turns
56 ;ON with a LOW gate signal. This polarity definition is not the same as the PWM
57 ;polarity(Active High/Active Low) defined by the ACTR
58 ;register in x24x/x24xx. The setting chosen here is applicable only when ACTR
59 ;is configured to generate Active High PWM.
60
61
62 7fff MAXPERIOD .set 7fffh
63
64 ;================================================================================
65
66 ; Frame Usage Details:
67 ; | a
68 ;____________|______________________________________
69 ; FR0 | |
70 ; FR1 | (1) temp_var1, (2) period |
71 ; FR2 | temp_var2 |
72 ;================================================================================
73
74 .def _F243_BLDC_PWM_Update
75 ;================================================================================
76
77 0000 _F243_BLDC_PWM_Update:
78 ;--------------------------------------------------------------------------
79
80 0003 __F243_BLDC_PWM_Update_framesize .set 0003h
81 ;================================================================================
82 ; ARP=AR1
83 ; AR1 is stack pointer (SP)
84 ; AR0 is frame pointer (FP)
85
86 0000 8aa0 POPD *+ ; Save the return address from hardware
87 ; stack into the software stack
88 ; ARP = AR1
89
90
91 0001 80a0 SAR AR0,*+ ; Push AR0(FP).ARP = AR1
92
93 0002 8180 SAR AR1,* ; *SP = SP.ARP = AR1.
94
95 0003 b003 LAR AR0, #__F243_BLDC_PWM_Update_framesize
96 ; AR0 = size of frame. ARP = AR1
97
98 0004 00ea LAR AR0,*0+,AR2
99 ; Allocate frame. ARP = AR2.
100 ; AR0 = AR1 + AR0.
101 ; AR1 is the Stack Pointer (SP)
102 ; AR0 is the Frame Pointer (FP)
103 ;================================================================================
104 0005 bf0a LAR AR2,#-3 ; AR2 = -3.
0006 fffd
105 ; ARP = AR2.
106 ;-------------------------------------------------------------------------------
107 0007 8be0 MAR *0+ ; AR2 = AR0 - 3. AR2 -> passed parameter
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue May 6 12:42:44 2003
Copyright (c) 1987-1999 Texas Instruments Incorporated
f243bldcpwm2.asm PAGE 3
108 ;(i.e. pointer to PWMGEN structure).
109 ; ARP = AR2.
110 ;--------------------------------------------------------------------------------
111 0008 038b LAR AR3,*,AR3
112 ; AR3 points to the first structure member.
113 ; (i.e. AR3 -> cmtn_ptr_bd).
114 ; ARP = AR3.
115 ;--------------------------------------------------------------------------
116 0009 bf80 LACC #_COMMUTATION_TBL
000a 0040'
117 ; Accumulator = COMMUTATION_TBL.
118 ; ARP = AR3. AR3 -> cmtn_ptr_bd.
119 ;--------------------------------------------------------------------------
120 000b 20aa ADD *+,AR2 ; Accumulator = Accumulator + cmtn_ptr_bd.
121 ; AR3 -> mfunc_p.
122 ; ARP = AR2.
123 ;--------------------------------------------------------------------------
124 000c b201 LAR AR2,#1 ; AR2 = 1.
125 ; AR3 -> mfunc_p.
126 ; ARP = AR2.
127 ;--------------------------------------------------------------------------
128 000d 8be0 MAR *0+ ; AR2 = AR0 + 1.
129 ; AR2-> FR1(i.e. temp_var1).
130 ; AR3 -> mfunc_p.
131 ; ARP = AR2
132 ;--------------------------------------------------------------------------
133 000e a680 TBLR * ; Load program address in data memory.
134 ; ARP = AR2.
135 ; AR2-> FR1(i.e. temp_var1).
136 ; AR3 -> mfunc_p.
137 ;--------------------------------------------------------------------------
138 000f 108b LACC *,AR3 ; Load state address in accumulator.
139 ; ARP = AR3. AR3 -> mfunc_p.
140 ; AR2-> FR1(scope of temp_var1 is over).
141 ;--------------------------------------------------------------------------
142 0010 be20 BACC ; Branch to the state specified
143 ; by accimulator.
144 ; ARP = AR3. AR3 -> mfunc_p.
145 ; AR2-> FR1.
146 ;================================================================================
147 0011 __PWM_state_anb: ; Input current path Phase A
148 0011 POINT_EV ; Output Current Path Phase B
1 0011 bce8 LDP #0E8h
149
150 0012 ae13 SPLK #00C2h,ACTR
0013 00c2
151 ; Non fed phase Phase C
152 ; *ACTR = 0x00C2.
153
154 0014 7980 B __PWM_state_end
0015 002d'
155 ; ARP = AR3. AR3 -> mfunc_p.
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