*******************************************************
* TMS320C2x/C2xx/C5x ANSI C Codegen Version 7.00       
*******************************************************
;	C:\TIC2XX\C2000\CGTOOLS\BIN\DSPAC.EXE -v2xx -q f07ilvd1.c C:\WINDOWS\TEMP\f07ilvd1.if 
;	dspopt NOT RUN
;	C:\TIC2XX\C2000\CGTOOLS\BIN\DSPCG.EXE -v2xx -o -q -o C:\WINDOWS\TEMP\f07ilvd1.if C:\WINDOWS\TEMP\f07ilvd1.asm C:\WINDOWS\TEMP\f07ilvd1.tmp 
	.port
	.file	"f07ilvd1.c"
	.file	"..\include\regs240x.h"
	.globl	_portffff
	.globl	_portff0f
	.globl	_port0
	.globl	_port1
	.globl	_port2
	.globl	_port3
	.globl	_port4
	.file	"..\include\F07ILVD.h"

	.stag	.fake0,208
	.member	_Imeas_a_gain,0,4,8,16
	.member	_Imeas_a_offset,16,4,8,16
	.member	_Imeas_a,32,4,8,16
	.member	_Imeas_b_gain,48,4,8,16
	.member	_Imeas_b_offset,64,4,8,16
	.member	_Imeas_b,80,4,8,16
	.member	_Vdc_meas_gain,96,4,8,16
	.member	_Vdc_meas_offset,112,4,8,16
	.member	_Vdc_meas,128,4,8,16
	.member	_Imeas_c,144,4,8,16
	.member	_Ch_sel,160,4,8,16
	.member	_init,176,148,8,16
	.member	_read,192,148,8,16
	.eos
	.sym	_ILEG2DCBUSMEAS,0,8,13,208,.fake0
	.globl	_F2407_ileg2_dcbus_drv_init
	.globl	_F2407_ileg2_dcbus_drv_read
	.file	"f07ilvd1.c"
	.text

	.sym	_F2407_ileg2_dcbus_drv_init,_F2407_ileg2_dcbus_drv_init,32,2,0
	.globl	_F2407_ileg2_dcbus_drv_init

	.func	46
;>>>> 	void inline F2407_ileg2_dcbus_drv_init(ILEG2DCBUSMEAS *p)
******************************************************
* FUNCTION DEF : _F2407_ileg2_dcbus_drv_init
******************************************************
_F2407_ileg2_dcbus_drv_init:

LF1	.set	0

	POPD	*+
	SAR	AR0,*+
	SAR	AR1,*
	LARK	AR0,1
	LAR	AR0,*0+,AR3

	.sym	_p,-3+LF1,24,9,16,.fake0
	.line	2
	.line	4
;>>>> 	        SCSR1=SCSR1|0x0080;                 /* Turn on the clocks to the ADC module*/
	LARK	AR3,28696
	LACK	128
	OR	* 
	SACL	* 
	.line	5
;>>>> 	        CALIBRATION=CALIBRATION_CONSTANT;
	LACK	0
	ADRK	160
	SACL	* ,AR4
	.line	7
;>>>> 	        GPTCONA=((GPTCONA&0xfe7f)|0x0080);   /* Set up EV Trigger      */
	LARK	AR4,29696
	LACK	65151
	AND	* 
	ORK	128
	SACL	* ,AR3
	.line	8
;>>>> 	        ADCTRL1=ADC_RESET_FLAG;             /* Reset the ADC Module    */
	SBRK	24
	SPLK	#16384,* 
	.line	9
;>>>> 	        ADCTRL1=ADCTRL1_INIT_STATE;         /* Set up ADCTRL1 register */
	SPLK	#12288,*+
	.line	10
;>>>> 	      	ADCTRL2=ADCTRL2_INIT_STATE;         /* Set up ADCTRL2 register */
	SPLK	#770,*+
	.line	11
;>>>> 	        MAXCONV=2;                          /* Specify three conversions  */
	LACK	2
	SACL	* ,AR2
	.line	13
;>>>> 	        CHSELSEQ1=p->Ch_sel;       			/* Configure channel selection */ 
	LARK	AR2,-3+LF1
	MAR	*0+
	LAR	AR5,* ,AR5
	ADRK	10
	LAC	* ,AR3
	MAR	*+
	SACL	* ,AR1
EPI0_1:
	.line	14
	SBRK	2
	LAR	AR0,*-
	PSHD	*
	RET

	.endfunc	59,000000000H,1
	.end