?? f43bdcpwm2.lst
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C:\TIC2XX\C2000\CGTOOLS\BIN\DSPA.EXE -q -v2xx -gs f43bdcpwm2.asm -o ..\obj\f43bdcpwm2.obj -l ..\temp\f43bdcpwm2.lst
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue Sep 12 10:25:27 2000
Copyright (c) 1987-1999 Texas Instruments Incorporated
f43bdcpwm2.asm PAGE 1
1 ;================================================================================
2 ; File: F243BLDCPWM2.ASM
3 ; Last Mod August 28, 2000
4 ; Description
5 ; This file contains source for the Full Compare PWM drivers for the F243
6 ; Applicability of these functions is indicated in the Table 1
7 ;================================================================================
8 ;================================================================================
9 ; T A B L E 1
10 ;================================================================================
11 ; Function Name | Applicability
12 ;================================================================================
13 ; | F240 | F241| F243 | LF2402 | LF2406 | LF2407
14 ; | | | | | |
15 ; F243_BLDC_PWM_Update | Y | Y | Y | | |
16 ;================================================================================
17 ;================================================================================
18 ; Routine Name: PWM Update Routine Routine Type: C Callable
19 ;
20 ; Description:
21 ;
22 ; C prototype : int F243_BLDC_PWM_Update(PWMGEN *p)
23 ;================================================================================
24 ; History: Created August 22, 2000
25 ;
26 ; Definition of the argument structure.
27 ; typedef struct {
28 ; int cmtn_ptr_bd;
29 ; int mfunc_p ;
30 ; int period_max;
31 ; int d_func ;
32 ; int (*init)();
33 ; int (*update)();
34 ; } PWMGEN;
35 ;
36 ;================================================================================
37
38 .include ..\include\x24x.h
39
40 POINT_EV .macro
41 LDP #0E8h
42 .endm
43
44
45 0001 ACTIVE_HI .set 1 ;Select ACTIVE_HI or ACTIVE_LO by setting
46 0000 ACTIVE_LO .set 0 ;the corresponding parameter to 1. Set the other
47 ;parameter to 0.
48
49 ;This setting depends on Power devices. ACTIVE_HI implies the power device turns
50 ;ON with a HIGH gate signal. ACTIVE_LO implies the power device turns
51 ;ON with a LOW gate signal. This polarity definition is not the same as the PWM
52 ;polarity(Active High/Active Low) defined by the ACTR
53 ;register in x24x/x24xx. The setting chosen here is applicable only when ACTR
54 ;is configured to generate Active High PWM.
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue Sep 12 10:25:27 2000
Copyright (c) 1987-1999 Texas Instruments Incorporated
f43bdcpwm2.asm PAGE 2
55
56
57 7fff MAXPERIOD .set 7fffh
58
59 ;================================================================================
60
61 ; Frame Usage Details:
62 ; | a
63 ;____________|______________________________________
64 ; FR0 | |
65 ; FR1 | (1) temp_var1, (2) period |
66 ; FR2 | temp_var2 |
67 ;================================================================================
68
69 .def _F243_BLDC_PWM_Update
70 ;================================================================================
71
72 0000 _F243_BLDC_PWM_Update:
73 ;--------------------------------------------------------------------------
74
75 0003 __F243_BLDC_PWM_Update_framesize .set 0003h
76 ;================================================================================
77 ; ARP=AR1
78 ; AR1 is stack pointer (SP)
79 ; AR0 is frame pointer (FP)
80
81 0000 8aa0 POPD *+ ; Save the return address from hardware
82 ; stack into the software stack
83 ; ARP = AR1
84
85
86 0001 80a0 SAR AR0,*+ ; Push AR0(FP).ARP = AR1
87
88 0002 8180 SAR AR1,* ; *SP = SP.ARP = AR1.
89
90 0003 b003 LAR AR0, #__F243_BLDC_PWM_Update_framesize
91 ; AR0 = size of frame. ARP = AR1
92
93 0004 00ea LAR AR0,*0+,AR2
94 ; Allocate frame. ARP = AR2.
95 ; AR0 = AR1 + AR0.
96 ; AR1 is the Stack Pointer (SP)
97 ; AR0 is the Frame Pointer (FP)
98 ;================================================================================
99 0005 bf0a LAR AR2,#-3 ; AR2 = -3.
0006 fffd
100 ; ARP = AR2.
101 ;-------------------------------------------------------------------------------
102 0007 8be0 MAR *0+ ; AR2 = AR0 - 3. AR2 -> passed parameter
103 ;(i.e. pointer to PWMGEN structure).
104 ; ARP = AR2.
105 ;--------------------------------------------------------------------------------
106 0008 038b LAR AR3,*,AR3
107 ; AR3 points to the first structure member.
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Tue Sep 12 10:25:27 2000
Copyright (c) 1987-1999 Texas Instruments Incorporated
f43bdcpwm2.asm PAGE 3
108 ; (i.e. AR3 -> cmtn_ptr_bd).
109 ; ARP = AR3.
110 ;--------------------------------------------------------------------------
111 0009 bf80 LACC #_COMMUTATION_TBL
000a 0040'
112 ; Accumulator = COMMUTATION_TBL.
113 ; ARP = AR3. AR3 -> cmtn_ptr_bd.
114 ;--------------------------------------------------------------------------
115 000b 20aa ADD *+,AR2 ; Accumulator = Accumulator + cmtn_ptr_bd.
116 ; AR3 -> mfunc_p.
117 ; ARP = AR2.
118 ;--------------------------------------------------------------------------
119 000c b201 LAR AR2,#1 ; AR2 = 1.
120 ; AR3 -> mfunc_p.
121 ; ARP = AR2.
122 ;--------------------------------------------------------------------------
123 000d 8be0 MAR *0+ ; AR2 = AR0 + 1.
124 ; AR2-> FR1(i.e. temp_var1).
125 ; AR3 -> mfunc_p.
126 ; ARP = AR2
127 ;--------------------------------------------------------------------------
128 000e a680 TBLR * ; Load program address in data memory.
129 ; ARP = AR2.
130 ; AR2-> FR1(i.e. temp_var1).
131 ; AR3 -> mfunc_p.
132 ;--------------------------------------------------------------------------
133 000f 108b LACC *,AR3 ; Load state address in accumulator.
134 ; ARP = AR3. AR3 -> mfunc_p.
135 ; AR2-> FR1(scope of temp_var1 is over).
136 ;--------------------------------------------------------------------------
137 0010 be20 BACC ; Branch to the state specified
138 ; by accimulator.
139 ; ARP = AR3. AR3 -> mfunc_p.
140 ; AR2-> FR1.
141 ;================================================================================
142 0011 __PWM_state_anb: ; Input current path Phase A
143 0011 POINT_EV ; Output Current Path Phase B
1 0011 bce8 LDP #0E8h
144
145 0012 ae13 SPLK #00C2h,ACTR
0013 00c2
146 ; Non fed phase Phase C
147 ; *ACTR = 0x00C2.
148
149 0014 7980 B __PWM_state_end
0015 002d'
150 ; ARP = AR3. AR3 -> mfunc_p.
151 ; AR2-> FR1.
152 ;--------------------------------------------------------------------------
153 0016 __PWM_state_anc: ; Input current path Phase A
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