?? f243adc2.asm
字號:
;=====================================================================================================================
; File name: F243ADC2.ASM
;
; Originator: Digital Control Systems Group
; Texas Instruments
; Description:
; This file contains source for the ADC Driver control module
; Applicability of these functions is indicated in the Table 1
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 9-15-2000 Release Rev 1.0
;================================================================================
; Applicability: F240,F241,C242,F243,F24xx. (Peripheral dependant).
;
;================================================================================
; T A B L E 1
;================================================================================
; Function Name | Applicability
;================================================================================
; | F240 | F241| F243 | LF2402 | LF2406 | LF2407
; | | | | | |
; F243_ADC_Update | Y | Y | Y | | |
;================================================================================
;================================================================================
; Routine Name: ADC DRIVER Routine Type: C Callable
;
; Description:
;
; C prototype : void F243_ADC_Update(ADCVALS *p);
; History created July 27,2000
;================================================================================
; Definition of ADCVALS
;
;typedef struct {
; int C1_gain;
; int C2_gain;
; int C3_gain;
; int C4_gain;
;
; int C1_out;
; int C2_out;
; int C3_out;
; int C4_out;
;
; int A4_ch_sel;
; int (*init)();
; int (*update)();
; } ADCVALS;
;
;
; Frame Usage Details:
; | a | b c d
;____________|_____________|____________________ ____________________________
; FR0 | | |
; FR1 | MASK | |
; FR2 | GPR1ADC | |
;================================================================================
.include ..\include\x24x.h
.def _F243_ADC_Update
POINT_PF1 .macro
LDP #0E0h
.endm
;================================================================================
_F243_ADC_Update:
__F243_ADC_Update_framesize .set 0003h
;--------------------------------------------------------------------------
; ARP=AR1
; AR1 - stack pointer (SP)
; AR0 - frame pointer (FP)
POPD *+ ; Save the return address from hardware
; stack onto the software stack
; ARP = AR1
SAR AR0, *+ ; Push AR0(FP).ARP = AR1
SAR AR1, * ; *SP = SP .ARP = AR1
LAR AR0, #__F243_ADC_Update_framesize
; AR0 = size of frame. ARP = AR1
LAR AR0, *0+, AR0 ; ARP = AR0. AR0 = AR1 + AR0.
; AR1 is the Stack Pointer (SP)
; AR0 is the Frame Pointer (FP)
;--------------------------------------------------------------------------
SBRK #3 ; AR0 -> Passed parameter( i.e Pointer
; to the ADC structure)
; ARP = AR0.
;--------------------------------------------------------------------------
LAR AR3,* ; AR3 points to the first structure member
; (i.e. AR3 -> c1_gain).
; ARP = AR0.
;--------------------------------------------------------------------------
LAR AR4,* ; AR4 points to the first structure member
; (i.e. AR4 -> c1_gain)
; ARP = AR0. AR3 -> c1_gain
;--------------------------------------------------------------------------
ADRK #3 ; Let AR0 be again FP.
; AR3 -> c1_gain. AR4 -> c1_gain
; ARP = AR0. AR0 -> FR0.
;--------------------------------------------------------------------------
LAR AR2,#1 ; AR2 = 1
; ARP = AR0. AR0 -> FR0.
; AR3 -> c1_gain. AR4 -> c1_gain
;--------------------------------------------------------------------------
MAR *,AR2 ; ARP = AR2
; AR3 -> c1_gain. AR4 -> c1_gain
; AR0 -> FR0.
;--------------------------------------------------------------------------
MAR *0+,AR3 ; AR2 = AR0 + 1
; AR2 -> FR1 (i.e. MASK)
; ARP = AR3. AR3 -> c1_gain.
; AR4 -> c1_gain
;--------------------------------------------------------------------------
SETC SXM ; Sign extension mode on
; AR2 -> FR1 (i.e. MASK)
; ARP = AR3. AR3 -> c1_gain.
; AR4 -> c1_gain
;--------------------------------------------------------------------------
POINT_PF1
LACC ADC_FIFO1
; Load Accumulator with
; ADC_FIFO1 status
; ARP = AR3. AR3 -> c1_gain.
; AR4 -> c1_gain.
; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SFR ; Right shift Accumulator
; contents by one bit
; ARP = AR3. AR3 -> c1_gain.
; AR4 -> c1_gain
; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
AND #7FFFh ; Accumulator = Accumulator & 7FFFh
; ARP = AR3. AR3 -> c1_gain.
; AR4 -> c1_gain
; AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
ADRK #4 ; ARP = AR3. AR3 -> c1_out.
; AR4 -> c1_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SACL *,AR4 ; Accumulator = c1_out
; ARP = AR4. AR3 -> c1_out.
; AR4 -> c1_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
LT *+,AR3 ; c1_gain in Q13
; ARP = AR3. AR3 -> c1_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
MPY * ; PREG = c1_gain * c1_out (Q13 x Q15 = Q28)
; ARP = AR3. AR3 -> c1_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
PAC ; Accumulator = c1_gain * c1_out
; ARP = AR3. AR3 -> c1_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SACH *+,3 ; Convert final result to Q15
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
;Read 2nd converted valu
;--------------------------------------------------------------------------
POINT_PF1
LACC ADC_FIFO2
; Load Accumulator with ADC_FIFO2 status
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SFR ; Right shift Accumulator
; contents by one bit
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
AND #7FFFh ; Accumulator = Accumulator & 7FFFh
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SACL *,AR4 ; Accumulator = c2_out
; ARP = AR4. AR3 -> c2_out.
; AR4 -> c2_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
LT *+,AR3 ; c2_gain in Q13 T-> c2_gain
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
MPY * ; PREG = c2_gain *c2_out (Q13 x Q15 = Q28)
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
PAC ; Accumulator = c2_gain *c2_out
; ARP = AR3. AR3 -> c2_out.
; AR4 -> c3_gain. AR2 -> FR1 (i.e. MASK)
;--------------------------------------------------------------------------
SACH *+,3 ; Convert final result to Q15
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