?? f07pwmdac2.asm
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;=====================================================================================================================
; File name: F07PWMDAC2.ASM
;
; Originator: Digital Control Systems Group
; Texas Instruments
; Description:
; This file contains source for converting any s/w variables with
; Q15 representation into the PWM signals in EVB for x240x only.
; Thus, it can be used to view the signal, represented by the
; variable, at the outputs of the PWM7, PWM9, PWM11 pins through the
; external lowpass filters.
; Applicability of these functions is indicated in the Table 1
;=====================================================================================
; History:
;-------------------------------------------------------------------------------------
; 12-10-2000 Release Rev 1.0
;================================================================================
; T A B L E 1
;================================================================================
; Function Name | Applicability
;================================================================================
; | F240 | F241| F243 | LF2402 | LF2406 | LF2407
; | | | | | |
; F2407_PWMDAC_Update | | | | Y | Y | Y
;================================================================================
;================================================================================
;
; Description:
;
; Sine Module
;
; C prototype : int F2407_PWMDAC_Update(PWMDAC *p)
;================================================================================
; History:
; __________________________________________________________________________
; Date of Mod | DESCRIPTION
; ------------|-----------------------------------------------------------
; |
; |
;================================================================================
; Definition of the argument structure.
; typedef struct {
; int *PWM_DAC_IPTR0; /* Pointer to source data output on PWMDAC channel 0 */
; int *PWM_DAC_IPTR1; /* Pointer to source data output on PWMDAC channel 1 */
; int *PWM_DAC_IPTR2; /* Pointer to source data output on PWMDAC channel 2 */
; int pwmdac_period; /* PWMDAC period in usec (Q0) */
; int (*init)(); /* Pointer to the init function */
; int (*update)(); /* Pointer to the update function */
; } PWMDAC ;
;
;
; Frame Usage Details:
; step | a | b | c | d
;____________|_____________|______________|______________|_____________
; FR0 | 15 | dac_period | |
;
;================================================================================
.def _F2407_PWMDAC_Update
;================================================================================
.include ..\include\x240x.h
;================================================================================
__F2407_PWMDAC_Update_framesize .set 0001h
;================================================================================
_F2407_PWMDAC_Update:
POPD *+ ; Keep return address
SAR AR0,*+ ; Keep old frame pointer (FP)
SAR AR1,* ; Keep old stack pointer (SP)
LARK AR0,__F2407_PWMDAC_Update_framesize ; Load AR0 with frame size
LAR AR0,*0+,AR0 ; AR0->FP0 (new FP), ARP=AR0
;================================================================================
SBRK #3 ; ARP=AR0, AR0->FR0-3 (1st argument)
;--------------------------------------------------------------------------------
LAR AR2,*,AR2 ; ARP=AR0, AR0->PWM_DAC_IPTR0, AR2->PWM_DAC_IPTR0, ARP=AR2
;--------------------------------------------------------------------------------
LAR AR3,*,AR0 ; ARP=AR2, AR0->PWM_DAC_IPTR0, AR2->PWM_DAC_IPTR0, AR3->(PWM_DAC_IPTR0), ARP=AR0
;--------------------------------------------------------------------------------
ADRK #3 ; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR0, AR3->(PWM_DAC_IPTR0)
;--------------------------------------------------------------------------------
MAR *,AR2 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR0, AR3->(PWM_DAC_IPTR0)
;--------------------------------------------------------------------------------
ADRK #3 ; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;----------------------------------------------------------------------------------
SETC SXM ; Turn sign extension mode on
; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;----------------------------------------------------------------------------------
SETC OVM ; Set overflow mode
; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;----------------------------------------------------------------------------------
SPM 0 ; Reset product mode
; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;--------------------------------------------------------------------------------
;Convert and update the appropriate timer 3 period
;--------------------------------------------------------------------------------
LT *,AR0 ; TREG = pwmdac_period (Q0)
; ARP=AR2, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), ARP=AR0
;--------------------------------------------------------------------------------
SPLK #15,* ; FR0 = 15
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;--------------------------------------------------------------------------------
MPY * ; PREG = pwmdac_period*15 (*1000nS/(2*33nS))
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0)
;--------------------------------------------------------------------------------
SACL *,AR4 ; FR0 = dac_period = pwmdac_period*15
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), ARP=AR4
;--------------------------------------------------------------------------------
LAR AR4,#T3PERB ; point AR4 to T3PERB
; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB
;--------------------------------------------------------------------------------
SACL *,AR0 ; T3PERB = pwmdac_period*15
; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB, ARP=AR0
;--------------------------------------------------------------------------------
;Convert Q15 input value to an appropriate compare value for PWM7 or PWM8 signal
;--------------------------------------------------------------------------------
LT *,AR3 ; TREG = dac_period
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB, ARP=AR3
;--------------------------------------------------------------------------------
MPY *,AR0 ; PREG = dac_period*(PWM_DAC_IPTR0)/2
; ARP=AR3, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB, ARP=AR0
;--------------------------------------------------------------------------------
PAC ; ACC = dac_period*(PWM_DAC_IPTR0)/2
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB
;--------------------------------------------------------------------------------
ADD *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR0)/2 + dac_period/2
; ARP=AR0, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->T3PERB, ARP=AR4
;--------------------------------------------------------------------------------
LAR AR4,#CMPR4B ; point AR4 to CMPR4B
; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->CMPR4B
;--------------------------------------------------------------------------------
SACH *+,AR2 ; CMPR4B = dac_period*(PWM_DAC_IPTR0)/2 + dac_period/2
; ARP=AR4, AR0->FR0, AR2->pwmdac_period, AR3->(PWM_DAC_IPTR0), AR4->CMPR5B, ARP=AR2
;--------------------------------------------------------------------------------
;Convert Q15 input value to an appropriate compare value for PWM9 or PWM10 signal
;--------------------------------------------------------------------------------
SBRK #2 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR1, AR3->(PWM_DAC_IPTR0), AR4->CMPR5B
;--------------------------------------------------------------------------------
LAR AR3,*+,AR3 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR5B, ARP=AR3
;--------------------------------------------------------------------------------
MPY *,AR0 ; PREG = dac_period*(PWM_DAC_IPTR1)/2
; ARP=AR3, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR5B, ARP=AR0
;--------------------------------------------------------------------------------
PAC ; ACC = dac_period*(PWM_DAC_IPTR1)/2
; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR5B
;--------------------------------------------------------------------------------
ADD *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR1)/2 + dac_period/2
; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR5B, ARP=AR4
;--------------------------------------------------------------------------------
SACH *+,AR2 ; CMPR5B = dac_period*(PWM_DAC_IPTR1)/2 + dac_period/2
; ARP=AR4, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR1), AR4->CMPR6B, ARP=AR2
;--------------------------------------------------------------------------------
;Convert Q15 input value to an appropriate compare value for PWM11 or PWM12 signal
;--------------------------------------------------------------------------------
LAR AR3,*,AR3 ; ARP=AR2, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR6B, ARP=AR3
;--------------------------------------------------------------------------------
MPY *,AR0 ; PREG = dac_period*(PWM_DAC_IPTR2)/2
; ARP=AR3, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR6B, ARP=AR0
;--------------------------------------------------------------------------------
PAC ; ACC = dac_period*(PWM_DAC_IPTR2)/2
; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR6B
;--------------------------------------------------------------------------------
ADD *,15,AR4 ; ACC = dac_period*(PWM_DAC_IPTR2)/2 + dac_period/2
; ARP=AR0, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR6B, ARP=AR4
;--------------------------------------------------------------------------------
SACH *,AR1 ; CMPR6B = dac_period*(PWM_DAC_IPTR2)/2 + dac_period/2
; ARP=AR4, AR0->FR0, AR2->PWM_DAC_IPTR2, AR3->(PWM_DAC_IPTR2), AR4->CMPR6B, ARP=AR1
;--------------------------------------------------------------------------------
_F2407_PWMDAC_Update_exit:
;MAR *,AR1 ; can be removed if this condition is met on
; ; every path to this code. (i.e., ARP=AR1 here)
SBRK #(__F2407_PWMDAC_Update_framesize+1)
LAR AR0,*-
PSHD *
RET
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